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Re: [PATCH] arm64: Expose TASK_SIZE to userspace via auxv

From Ard Biesheuvel <ard.biesheuvel@linaro.org>
Newsgroups linux.kernel
Subject Re: [PATCH] arm64: Expose TASK_SIZE to userspace via auxv
Date 2016-08-18 14:10 +0200
Message-ID <s7uiZ-82P-27@gated-at.bofh.it> (permalink)
References <s6Rrj-6BB-1@gated-at.bofh.it> <s76qm-8dD-41@gated-at.bofh.it> <s7733-g9-19@gated-at.bofh.it>
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On 17 August 2016 at 13:12, Christopher Covington <cov@codeaurora.org> wrote:
>
>
> On August 17, 2016 6:30:06 AM EDT, Catalin Marinas <catalin.marinas@arm.com> wrote:
>>On Tue, Aug 16, 2016 at 02:32:29PM -0400, Christopher Covington wrote:
>>> Some userspace applications need to know the maximum virtual address
>>they can
>>> use (TASK_SIZE).
>>
>>Just curious, what are the cases needing TASK_SIZE in user space?
>
> Checkpoint/Restore In Userspace and the Mozilla Javascript Engine https://bugzilla.mozilla.org/show_bug.cgi?id=1143022 are the specific cases I've run into. I've heard LuaJIT might have a similar situation. In general I think making allocations from the top down is a shortcut for finding a large unused region of memory.
>

One aspect of this that I would like to discuss is whether the current
practice makes sense, of tying TASK_SIZE to whatever the size of the
kernel VA space is.

I could imagine simply limiting the user VA space to 39-bits (or even
36-bits, depending on how deeply we care about 16 KB pages), and
implement an arch specific hook (prctl() perhaps?) to increase
TASK_SIZE on demand. That would not only give us a reliable way to
check whether this is supported (i.e., the prctl() would return error
if it isn't), it also allows for some optimizations, since a 48-bit VA
kernel can run all processes using 3 levels with relative ease (and
switching between 4levels and 3levels processes would also be
possible, but would either require a TLB flush, or would result in
this optimization to be disabled globally, whichever is less costly in
terms of performance)

-- 
Ard.

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Thread

[PATCH] arm64: Expose TASK_SIZE to userspace via auxv Christopher Covington <cov@codeaurora.org> - 2016-08-16 20:40 +0200
  Re: [PATCH] arm64: Expose TASK_SIZE to userspace via auxv Catalin Marinas <catalin.marinas@arm.com> - 2016-08-17 12:40 +0200
    Re: [PATCH] arm64: Expose TASK_SIZE to userspace via auxv Christopher Covington <cov@codeaurora.org> - 2016-08-17 13:20 +0200
      Re: [PATCH] arm64: Expose TASK_SIZE to userspace via auxv Ard Biesheuvel <ard.biesheuvel@linaro.org> - 2016-08-18 14:10 +0200
        Re: [PATCH] arm64: Expose TASK_SIZE to userspace via auxv Catalin Marinas <catalin.marinas@arm.com> - 2016-08-18 14:50 +0200
          Re: [PATCH] arm64: Expose TASK_SIZE to userspace via auxv Ard Biesheuvel <ard.biesheuvel@linaro.org> - 2016-08-18 15:30 +0200
      Re: [PATCH] arm64: Expose TASK_SIZE to userspace via auxv Richard Weinberger <richard.weinberger@gmail.com> - 2016-08-18 14:20 +0200

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