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[PATCH v4 0/3] MT8173 HDMI 4K support

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This is MT8173 HDMI 4K support PATCH v4, based on 4.8-rc1.

In order to support HDMI 4K on MT8173,
we have to make some modifications.
1) Make sure that mtk_hdmi_send_infoframe is sent successfully.
2) Enhance the HDMI driving current to improve performance.
3) Make sure that pixel clock is 297MHz when resolution is 4K.

Changes since v3:
 - Rebase to 4.8-rc1.
 - The valid range of tvdpll is 1G to 2G Hz, so, we Change the
   if statement of mode->clock to fit that and add a comment.

Changes since v2:
 - Remove the change about preparation for MT2701 support.

Changes since v1:
 - According to the suggestion from philipp, We use the new
   dpi0_sel rate set method.
 - calls clk_set_rate to set the dpi0_sel according to the
   pixel clock.
 - Remove the direct access to all the intermediate clock part.
 - Remove the intermediate tvdpll_d* clocks in dts.
 - According to suggestion from CK, we rename the clock parse
   function and remove it from mtk_dpi_conf struct.
 - Merges the hdmi Pll set rate for pixel clock greater than
   165MHz and smaller parts.

The PATCH depends on the following patch:
https://patchwork.kernel.org/patch/9262575/
(arm64: dts: mt8173: add mmsel clocks for 4K support)

Junzhi Zhao (3):
  drm/mediatek: do mtk_hdmi_send_infoframe after HDMI clock enable
  drm/mediatek: enhance the HDMI driving current
  drm/mediatek: fix the wrong pixel clock when resolution is 4K

 drivers/gpu/drm/mediatek/mtk_dpi.c             |    9 +++--
 drivers/gpu/drm/mediatek/mtk_hdmi.c            |   17 ++++++----
 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c |   42 +++++++++++++++++-------
 3 files changed, 48 insertions(+), 20 deletions(-)

-- 
1.7.9.5

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[PATCH v4 0/3] MT8173 HDMI 4K support Bibby Hsieh <bibby.hsieh@mediatek.com> - 2016-08-17 09:00 +0200
  [PATCH v4 2/3] drm/mediatek: enhance the HDMI driving current Bibby Hsieh <bibby.hsieh@mediatek.com> - 2016-08-17 09:00 +0200
  [PATCH v4 1/3] drm/mediatek: do mtk_hdmi_send_infoframe after HDMI clock enable Bibby Hsieh <bibby.hsieh@mediatek.com> - 2016-08-17 09:00 +0200

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