Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1463323
| From | "Yong, Jonathan" <jonathan.yong@intel.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v6 0/3] PCI: Precision Time Measurement support |
| Date | 2016-08-16 03:30 +0200 |
| Message-ID | <s6Bmx-4Uu-1@gated-at.bofh.it> (permalink) |
| References | <rJFpg-22H-7@gated-at.bofh.it> <rWKAN-KV-3@gated-at.bofh.it> <rWMVY-22W-21@gated-at.bofh.it> <s6vh7-LT-1@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On 08/16/2016 02:51, Bjorn Helgaas wrote:
>>
>> This line:
>> ctrl = PCI_PTM_CTRL_ENABLE | PCI_PTM_CTRL_ROOT;
>>
>> should also set the responder capable bit (7.32.2):
>> If PTM Root Capable is Set, this bit must be Set to 1b.
>
> The PTM Responder Capable bit (bit 1 in Table 7-145) is a HwInit bit
> in the PTM Capability register, so it's read-only from the kernel's
> perspective.
>
> The line you mention ("ctrl = PCI_PTM_CTRL_ENABLE | PCI_PTM_CTRL_ROOT")
> is turning on bits in the PTM Control register, not the Capability
> register.
>
My bad, there is no "responder enable" bit control, patch looks good.
Back to linux.kernel | Previous | Next — Previous in thread | Find similar | Unroll thread
Re: [PATCH v6 0/3] PCI: Precision Time Measurement support Bjorn Helgaas <helgaas@kernel.org> - 2016-08-15 21:00 +0200 Re: [PATCH v6 0/3] PCI: Precision Time Measurement support "Yong, Jonathan" <jonathan.yong@intel.com> - 2016-08-16 03:30 +0200
csiph-web