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Re: [PATCH v5] x86/hpet: Reduce HPET counter read contention

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On 08/12/2016 02:25 PM, Waiman Long wrote:
> + * The lock and the hpet value are stored together and can be read in a
> + * single atomic 64-bit read. It is explicitly assumed that the raw spinlock
> + * size is 32-bit.

So what happens when we have all the fun debugging options on?

> typedef struct raw_spinlock {
>         arch_spinlock_t raw_lock;
> #ifdef CONFIG_GENERIC_LOCKBREAK
>         unsigned int break_lock;
> #endif
> #ifdef CONFIG_DEBUG_SPINLOCK
>         unsigned int magic, owner_cpu;
>         void *owner;
> #endif
> #ifdef CONFIG_DEBUG_LOCK_ALLOC
>         struct lockdep_map dep_map;
> #endif
> } raw_spinlock_t;

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[PATCH v5] x86/hpet: Reduce HPET counter read contention Waiman Long <Waiman.Long@hpe.com> - 2016-08-12 23:30 +0200
  Re: [PATCH v5] x86/hpet: Reduce HPET counter read contention Dave Hansen <dave.hansen@intel.com> - 2016-08-12 23:40 +0200
  Re: [PATCH v5] x86/hpet: Reduce HPET counter read contention Dave Hansen <dave.hansen@intel.com> - 2016-08-12 23:50 +0200

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