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Re: [PATCHv5] arm64: Handle el1 synchronous instruction aborts cleanly

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On Fri, Aug 12, 2016 at 06:05:09PM +0100, Catalin Marinas wrote:
> On Tue, Aug 09, 2016 at 06:25:26PM -0700, Laura Abbott wrote:
> > Executing from a non-executable area gives an ugly message:
> > 
> > lkdtm: Performing direct entry EXEC_RODATA
> > lkdtm: attempting ok execution at ffff0000084c0e08
> > lkdtm: attempting bad execution at ffff000008880700
> > Bad mode in Synchronous Abort handler detected on CPU2, code 0x8400000e -- IABT (current EL)
> > CPU: 2 PID: 998 Comm: sh Not tainted 4.7.0-rc2+ #13
> > Hardware name: linux,dummy-virt (DT)
> > task: ffff800077e35780 ti: ffff800077970000 task.ti: ffff800077970000
> > PC is at lkdtm_rodata_do_nothing+0x0/0x8
> > LR is at execute_location+0x74/0x88
> > 
> > The 'IABT (current EL)' indicates the error but it's a bit cryptic
> > without knowledge of the ARM ARM. There is also no indication of the
> > specific address which triggered the fault. The increase in kernel
> > page permissions makes hitting this case more likely as well.
> > Handling the case in the vectors gives a much more familiar looking
> > error message:
> > 
> > lkdtm: Performing direct entry EXEC_RODATA
> > lkdtm: attempting ok execution at ffff0000084c0840
> > lkdtm: attempting bad execution at ffff000008880680
> > Unable to handle kernel paging request at virtual address ffff000008880680
> > pgd = ffff8000089b2000
> > [ffff000008880680] *pgd=00000000489b4003, *pud=0000000048904003, *pmd=0000000000000000
> > Internal error: Oops: 8400000e [#1] PREEMPT SMP
> > Modules linked in:
> > CPU: 1 PID: 997 Comm: sh Not tainted 4.7.0-rc1+ #24
> > Hardware name: linux,dummy-virt (DT)
> > task: ffff800077f9f080 ti: ffff800008a1c000 task.ti: ffff800008a1c000
> > PC is at lkdtm_rodata_do_nothing+0x0/0x8
> > LR is at execute_location+0x74/0x88
> > 
> > Acked-by: Mark Rutland <mark.rutland@arm.com>
> > Signed-off-by: Laura Abbott <labbott@redhat.com>
> 
> Applied. Thanks.

Actually, Will queued it already for 4.9.

-- 
Catalin

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Re: [PATCHv5] arm64: Handle el1 synchronous instruction aborts  cleanly Catalin Marinas <catalin.marinas@arm.com> - 2016-08-12 19:10 +0200
  Re: [PATCHv5] arm64: Handle el1 synchronous instruction aborts  cleanly Catalin Marinas <catalin.marinas@arm.com> - 2016-08-12 19:20 +0200

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