Re: [PATCH 2/2] KVM: nVMX: postpone VMCS changes on MSR_IA32_APICBASE write

From	Wanpeng Li <kernellwp@gmail.com>
Newsgroups	linux.kernel
Subject	Re: [PATCH 2/2] KVM: nVMX: postpone VMCS changes on MSR_IA32_APICBASE write
Date	2016-08-12 08:10 +0200
Message-ID	<s5dPj-6mv-15@gated-at.bofh.it> (permalink)
References	<s3Xjz-4So-7@gated-at.bofh.it> <s3Xjz-4So-5@gated-at.bofh.it>
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2016-08-09 2:16 GMT+08:00 Radim Krčmář <rkrcmar@redhat.com>:
> If vmcs12 does not intercept APIC_BASE writes, then KVM will handle the
> write with vmcs02 as the current VMCS.
> This will incorrectly apply modifications intended for vmcs01 to vmcs02
> and L2 can use it to gain access to L0's x2APIC registers by disabling
> virtualized x2APIC while using msr bitmap that assumes enabled.
>
> Postpone execution of vmx_set_virtual_x2apic_mode until vmcs01 is the
> current VMCS.  An alternative solution would temporarily make vmcs01 the
> current VMCS, but it requires more care.

There is a scenario both L1 and L2 are running on x2apic mode, L1
don't own the APIC_BASE writes, then L2 is intended to disable x2apic
mode, however, your logic will also disable x2apic mode for L1.

Regards,
Wanpeng Li

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Re: [PATCH 2/2] KVM: nVMX: postpone VMCS changes on MSR_IA32_APICBASE write Wanpeng Li <kernellwp@gmail.com> - 2016-08-12 08:10 +0200
  Re: [PATCH 2/2] KVM: nVMX: postpone VMCS changes on  MSR_IA32_APICBASE write Radim Krčmář <rkrcmar@redhat.com> - 2016-08-12 11:50 +0200
    Re: [PATCH 2/2] KVM: nVMX: postpone VMCS changes on MSR_IA32_APICBASE write Wanpeng Li <kernellwp@gmail.com> - 2016-08-12 12:20 +0200
      Re: [PATCH 2/2] KVM: nVMX: postpone VMCS changes on  MSR_IA32_APICBASE write Radim Krčmář <rkrcmar@redhat.com> - 2016-08-12 13:40 +0200
        Re: [PATCH 2/2] KVM: nVMX: postpone VMCS changes on MSR_IA32_APICBASE write Wanpeng Li <kernellwp@gmail.com> - 2016-08-15 07:20 +0200
          Re: [PATCH 2/2] KVM: nVMX: postpone VMCS changes on  MSR_IA32_APICBASE write Radim Krčmář <rkrcmar@redhat.com> - 2016-08-15 16:40 +0200

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