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Re: [PATCH 09/20] SEAD3: Probe parallel flash via DT

From Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Newsgroups linux.kernel
Subject Re: [PATCH 09/20] SEAD3: Probe parallel flash via DT
Date 2016-08-09 15:30 +0200
Message-ID <s4fgu-888-7@gated-at.bofh.it> (permalink)
References <s4eu6-7y7-3@gated-at.bofh.it> <s4eu6-7y7-5@gated-at.bofh.it>
Organization Cogent Embedded

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Hello.

On 08/09/2016 03:35 PM, Paul Burton wrote:

> Probe the system parallel flash using device tree rather than platform
> code, in order to reduce the amount of the latter.
>
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> ---
>
>  arch/mips/boot/dts/mti/sead3.dts     | 17 +++++++++++++++++
>  arch/mips/mti-sead3/sead3-platform.c | 37 ------------------------------------
>  2 files changed, 17 insertions(+), 37 deletions(-)
>
> diff --git a/arch/mips/boot/dts/mti/sead3.dts b/arch/mips/boot/dts/mti/sead3.dts
> index 66f7947..7799826 100644
> --- a/arch/mips/boot/dts/mti/sead3.dts
> +++ b/arch/mips/boot/dts/mti/sead3.dts
> @@ -67,6 +67,23 @@
>  		interrupts = <0>; /* GIC 0 or CPU 6 */
>  	};
>
> +	pflash@1c000000 {

    What's "pflash"? I'd suggest to just name the ndoe "flash@..." to be more 
in line with ePAPR.

> +		compatible = "intel,28f128j3", "cfi-flash";
> +		reg = <0x1c000000 0x2000000>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +
> +		user-fs@0 {
> +			label = "User FS";
> +			reg = <0x0 0x1fc0000>;
> +		};
> +
> +		board-config@3e0000 {
> +			label = "Board Config";
> +			reg = <0x1fc0000 0x40000>;
> +		};

    Doesn't MTD code complain that the partitions are not subnodes of a 
"partitions" node?
It's the preferred way now...

> +	};
> +
>  	/* UART connected to FTDI & miniUSB socket */
>  	uart0: uart@1f000900 {
>  		compatible = "ns16550a";
[...]

MBR, Sergei

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[PATCH 09/20] SEAD3: Probe parallel flash via DT Paul Burton <paul.burton@imgtec.com> - 2016-08-09 14:40 +0200
  Re: [PATCH 09/20] SEAD3: Probe parallel flash via DT Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> - 2016-08-09 15:30 +0200

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