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Groups > linux.kernel > #1456151
| From | Rich Felker <dalias@libc.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v6 1/2] of: add J-Core timer bindings |
| Date | 2016-08-04 06:40 +0200 |
| Message-ID | <s2iBP-436-1@gated-at.bofh.it> (permalink) |
| References | <s2iBP-436-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Signed-off-by: Rich Felker <dalias@libc.org>
---
.../devicetree/bindings/timer/jcore,pit.txt | 24 ++++++++++++++++++++++
1 file changed, 24 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/jcore,pit.txt
diff --git a/Documentation/devicetree/bindings/timer/jcore,pit.txt b/Documentation/devicetree/bindings/timer/jcore,pit.txt
new file mode 100644
index 0000000..af5dd35
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/jcore,pit.txt
@@ -0,0 +1,24 @@
+J-Core Programmable Interval Timer and Clocksource
+
+Required properties:
+
+- compatible: Must be "jcore,pit".
+
+- reg: Memory region(s) for timer/clocksource registers. For SMP,
+ there should be one region per cpu, indexed by the sequential,
+ zero-based hardware cpu number.
+
+- interrupts: An interrupt to assign for the timer. The actual pit
+ core is integrated with the aic and allows the timer interrupt
+ assignment to be programmed by software, but this property is
+ required in order to reserve an interrupt number that doesn't
+ conflict with other devices.
+
+
+Example:
+
+timer@200 {
+ compatible = "jcore,pit";
+ reg = < 0x200 0x30 0x500 0x30 >;
+ interrupts = < 0x48 >;
+};
--
2.8.1
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[PATCH v6 1/2] of: add J-Core timer bindings Rich Felker <dalias@libc.org> - 2016-08-04 06:40 +0200 Re: [PATCH v6 1/2] of: add J-Core timer bindings Rob Herring <robh@kernel.org> - 2016-08-04 21:30 +0200
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