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Re: [PATCH v2 2/2] arm64: dts: Fix broken architected timer interrupt trigger

From Masahiro Yamada <yamada.masahiro@socionext.com>
Newsgroups linux.kernel
Subject Re: [PATCH v2 2/2] arm64: dts: Fix broken architected timer interrupt trigger
Date 2016-08-01 12:10 +0200
Message-ID <s1iky-4Uz-21@gated-at.bofh.it> (permalink)
References <s1iaR-4Cd-7@gated-at.bofh.it> <s1iaR-4Cd-5@gated-at.bofh.it>
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2016-08-01 18:54 GMT+09:00 Marc Zyngier <marc.zyngier@arm.com>:
> The ARM architected timer specification mandates that the interrupt
> associated with each timer is level triggered (which corresponds to
> the "counter >= comparator" condition).
>
> A number of DTs are being remarkably creative, declaring the interrupt
> to be edge triggered. A quick look at the TRM for the corresponding ARM
> CPUs clearly shows that this is wrong, and I've corrected those.
> For non-ARM designs (and in the absence of a publicly available TRM),
> I've made them active low as well, which can't be completely wrong
> as the GIC cannot disinguish between level low and level high.
>
> The respective maintainers are of course welcome to prove me wrong.
>
> While I was at it, I took the liberty to fix a couple of related issue,
> such as some spurious affinity bits on ThunderX, and their complete
> absence on ls1043a (both of which seem to be related to copy-pasting
> from other DTs).
>
> Acked-by: Duc Dang <dhdang@apm.com>
> Acked-by: Carlo Caione <carlo@endlessm.com>
> Acked-by: Michal Simek <michal.simek@xilinx.com>
> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
>  arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi    | 8 ++++----
>  arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi          | 8 ++++----
>  arch/arm64/boot/dts/apm/apm-storm.dtsi               | 8 ++++----
>  arch/arm64/boot/dts/broadcom/ns2.dtsi                | 8 ++++----
>  arch/arm64/boot/dts/cavium/thunder-88xx.dtsi         | 8 ++++----
>  arch/arm64/boot/dts/exynos/exynos7.dtsi              | 8 ++++----
>  arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi       | 8 ++++----
>  arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi       | 8 ++++----
>  arch/arm64/boot/dts/marvell/armada-ap806.dtsi        | 8 ++++----
>  arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi | 8 ++++----


For uniphier-ph1-ld20.dtsi,

Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>


Thank you!!


-- 
Best Regards
Masahiro Yamada

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[PATCH v2 2/2] arm64: dts: Fix broken architected timer interrupt trigger Marc Zyngier <marc.zyngier@arm.com> - 2016-08-01 12:00 +0200
  Re: [PATCH v2 2/2] arm64: dts: Fix broken architected timer interrupt trigger Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-08-01 12:10 +0200

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