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Groups > linux.kernel > #1402303
| From | Daniel Borkmann <daniel@iogearbox.net> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v2 net-next] bpf: arm64: remove callee-save registers use for tmp registers |
| Date | 2016-05-17 14:00 +0200 |
| Message-ID | <rzLPk-45N-9@gated-at.bofh.it> (permalink) |
| References | <rzAKe-5zr-13@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On 05/17/2016 01:36 AM, Yang Shi wrote: > In the current implementation of ARM64 eBPF JIT, R23 and R24 are used for > tmp registers, which are callee-saved registers. This leads to variable size > of JIT prologue and epilogue. The latest blinding constant change prefers to > constant size of prologue and epilogue. AAPCS reserves R9 ~ R15 for temp > registers which not need to be saved/restored during function call. So, replace > R23 and R24 to R10 and R11, and remove tmp_used flag to save 2 instructions for > some jited BPF program. > > CC: Daniel Borkmann <daniel@iogearbox.net> > Acked-by: Zi Shen Lim <zlim.lnx@gmail.com> > Signed-off-by: Yang Shi <yang.shi@linaro.org> LGTM, thanks! Acked-by: Daniel Borkmann <daniel@iogearbox.net>
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[PATCH v2 net-next] bpf: arm64: remove callee-save registers use for tmp registers Yang Shi <yang.shi@linaro.org> - 2016-05-17 02:10 +0200 Re: [PATCH v2 net-next] bpf: arm64: remove callee-save registers use for tmp registers Catalin Marinas <catalin.marinas@arm.com> - 2016-05-17 13:20 +0200 Re: [PATCH v2 net-next] bpf: arm64: remove callee-save registers use for tmp registers Daniel Borkmann <daniel@iogearbox.net> - 2016-05-17 14:00 +0200 Re: [PATCH v2 net-next] bpf: arm64: remove callee-save registers use for tmp registers David Miller <davem@davemloft.net> - 2016-05-17 20:10 +0200
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