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Re: [PATCH v4 3/4] x86, boot: Implement ASLR for kernel memory sections (x86_64)

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Hi,

[auto build test ERROR on next-20160512]
[cannot apply to tip/x86/core v4.6-rc7 v4.6-rc6 v4.6-rc5 v4.6-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help improving the system]

url:    https://github.com/0day-ci/linux/commits/Thomas-Garnier/x86-boot-KASLR-memory-randomization/20160513-001319
config: i386-tinyconfig (attached as .config)
compiler: gcc-6 (Debian 6.1.1-1) 6.1.1 20160430
reproduce:
        # save the attached .config to linux build tree
        make ARCH=i386 

Note: the linux-review/Thomas-Garnier/x86-boot-KASLR-memory-randomization/20160513-001319 HEAD cc523b95f012eb1d78508133b5b19b0a561ed3e1 builds fine.
      It only hurts bisectibility.

All errors (new ones prefixed by >>):

   arch/x86/mm/init.c: In function 'init_mem_mapping':
>> arch/x86/mm/init.c:595:2: error: 'trampoline_pgd_entry' undeclared (first use in this function)
     trampoline_pgd_entry = init_level4_pgt[pgd_index(__PAGE_OFFSET)];
     ^~~~~~~~~~~~~~~~~~~~
   arch/x86/mm/init.c:595:2: note: each undeclared identifier is reported only once for each function it appears in
>> arch/x86/mm/init.c:595:25: error: 'init_level4_pgt' undeclared (first use in this function)
     trampoline_pgd_entry = init_level4_pgt[pgd_index(__PAGE_OFFSET)];
                            ^~~~~~~~~~~~~~~

vim +/trampoline_pgd_entry +595 arch/x86/mm/init.c

   589	#endif
   590	
   591		/* the ISA range is always mapped regardless of memory holes */
   592		init_memory_mapping(0, ISA_END_ADDRESS);
   593	
   594		/* Default trampoline pgd value */
 > 595		trampoline_pgd_entry = init_level4_pgt[pgd_index(__PAGE_OFFSET)];
   596	
   597		/* Init the trampoline page table if needed for KASLR memory */
   598		kaslr_trampoline_init();

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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[PATCH v4 3/4] x86, boot: Implement ASLR for kernel memory sections (x86_64) Thomas Garnier <thgarnie@google.com> - 2016-05-12 18:20 +0200
  Re: [PATCH v4 3/4] x86, boot: Implement ASLR for kernel memory  sections (x86_64) kbuild test robot <lkp@intel.com> - 2016-05-12 18:30 +0200
    Re: [PATCH v4 3/4] x86, boot: Implement ASLR for kernel memory  sections (x86_64) Thomas Garnier <thgarnie@google.com> - 2016-05-12 19:00 +0200

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