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[PATCH 1/3] dmaengine: at_xdmac: align descriptors on 64 bits

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Having descriptors aligned on 64 bits allows update CNDA and CUBC in an
atomic way.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Fixes: e1f7c9eee707 ("dmaengine: at_xdmac: creation of the atmel
eXtended DMA Controller driver")
Cc: stable@vger.kernel.org #v4.1 and later
---
 drivers/dma/at_xdmac.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
index 8e304b1..ba9b0b7 100644
--- a/drivers/dma/at_xdmac.c
+++ b/drivers/dma/at_xdmac.c
@@ -242,7 +242,7 @@ struct at_xdmac_lld {
 	u32		mbr_dus;	/* Destination Microblock Stride Register */
 };
 
-
+/* 64-bit alignment needed to update CNDA and CUBC registers in an atomic way. */
 struct at_xdmac_desc {
 	struct at_xdmac_lld		lld;
 	enum dma_transfer_direction	direction;
@@ -253,7 +253,7 @@ struct at_xdmac_desc {
 	unsigned int			xfer_size;
 	struct list_head		descs_list;
 	struct list_head		xfer_node;
-};
+} __aligned(sizeof(u64));
 
 static inline void __iomem *at_xdmac_chan_reg_base(struct at_xdmac *atxdmac, unsigned int chan_nb)
 {
-- 
2.5.0

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[PATCH 1/3] dmaengine: at_xdmac: align descriptors on 64 bits Ludovic Desroches <ludovic.desroches@atmel.com> - 2016-05-12 17:00 +0200
  [PATCH 3/3] dmaengine: at_xdmac: double FIFO flush needed to compute residue Ludovic Desroches <ludovic.desroches@atmel.com> - 2016-05-12 17:00 +0200
    Re: [PATCH 3/3] dmaengine: at_xdmac: double FIFO flush needed to  compute residue Nicolas Ferre <nicolas.ferre@atmel.com> - 2016-05-13 14:30 +0200
  Re: [PATCH 1/3] dmaengine: at_xdmac: align descriptors on 64 bits Nicolas Ferre <nicolas.ferre@atmel.com> - 2016-05-13 14:30 +0200
  Re: [PATCH 1/3] dmaengine: at_xdmac: align descriptors on 64 bits Vinod Koul <vinod.koul@intel.com> - 2016-05-30 07:20 +0200

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