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Re: [PATCH] irqchip/gic-v3: Configure all interrupts as non-secure Group-1

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On 10 May 2016 at 11:21, Marc Zyngier <marc.zyngier@arm.com> wrote:
> The GICv3 driver wrongly assumes that it runs on the non-secure
> side of a secure-enabled system, while it could be on a system
> with a single security state, or a GICv3 with GICD_CTLR.DS set.
>
> Either way, it is important to configure this properly, or
> interrupts will simply not be delivered on this HW.
>
> Cc: stable@vger.kernel.org
> Reported-by: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> It is getting a bit late for 4.6, so I plan to put this on top of
> the 4.7 stuff, and let it trickle down to the stable trees (hence
> the CC to stable).

Tested-by: Peter Maydell <peter.maydell@linaro.org>

(using a QEMU with GICv3 emulation, which is how I found this bug
in the first place.)

thanks
-- PMM

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[PATCH] irqchip/gic-v3: Configure all interrupts as non-secure Group-1 Marc Zyngier <marc.zyngier@arm.com> - 2016-05-10 12:30 +0200
  Re: [PATCH] irqchip/gic-v3: Configure all interrupts as non-secure Group-1 Peter Maydell <peter.maydell@linaro.org> - 2016-05-10 12:50 +0200

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