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Groups > linux.kernel > #1397930
| From | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [RFC PATCH 09/21] clk: uniphier: add clock driver for UniPhier PH1-LD20 SoC |
| Date | 2016-05-10 12:00 +0200 |
| Message-ID | <rxcCp-8kL-77@gated-at.bofh.it> (permalink) |
| References | <rxcCl-8kL-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
This series is just for review.
Please do not apply this patch.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
drivers/clk/uniphier/Kconfig | 4 ++
drivers/clk/uniphier/Makefile | 1 +
drivers/clk/uniphier/clk-uniphier-ld20.c | 83 ++++++++++++++++++++++++++++++++
3 files changed, 88 insertions(+)
create mode 100644 drivers/clk/uniphier/clk-uniphier-ld20.c
diff --git a/drivers/clk/uniphier/Kconfig b/drivers/clk/uniphier/Kconfig
index 1746aea..6e0a311 100644
--- a/drivers/clk/uniphier/Kconfig
+++ b/drivers/clk/uniphier/Kconfig
@@ -30,4 +30,8 @@ config CLK_UNIPHIER_LD11
tristate "Clock driver for UniPhier PH1-LD11 SoC"
default ARM64
+config CLK_UNIPHIER_LD20
+ tristate "Clock driver for UniPhier PH1-LD20 SoC"
+ default ARM64
+
endif
diff --git a/drivers/clk/uniphier/Makefile b/drivers/clk/uniphier/Makefile
index e056771..59272a6 100644
--- a/drivers/clk/uniphier/Makefile
+++ b/drivers/clk/uniphier/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_CLK_UNIPHIER_SLD8) += clk-uniphier-sld8.o
obj-$(CONFIG_CLK_UNIPHIER_PRO5) += clk-uniphier-pro5.o
obj-$(CONFIG_CLK_UNIPHIER_PXS2) += clk-uniphier-pxs2.o
obj-$(CONFIG_CLK_UNIPHIER_LD11) += clk-uniphier-ld11.o
+obj-$(CONFIG_CLK_UNIPHIER_LD20) += clk-uniphier-ld20.o
diff --git a/drivers/clk/uniphier/clk-uniphier-ld20.c b/drivers/clk/uniphier/clk-uniphier-ld20.c
new file mode 100644
index 0000000..a15a59b
--- /dev/null
+++ b/drivers/clk/uniphier/clk-uniphier-ld20.c
@@ -0,0 +1,83 @@
+/*
+ * Copyright (C) 2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+
+#include "clk-uniphier.h"
+
+static const struct uniphier_clk_data uniphier_ld20_clk_data[] = {
+ {
+ .name = "spll",
+ .type = UNIPHIER_CLK_TYPE_FIXED_FACTOR,
+ .output_index = -1,
+ .data.factor = {
+ .parent_name = "ref",
+ .mult = 80,
+ .div = 1,
+ },
+ },
+ {
+ .name = "uart",
+ .type = UNIPHIER_CLK_TYPE_FIXED_FACTOR,
+ .output_index = 0,
+ .data.factor = {
+ .parent_name = "spll",
+ .mult = 1,
+ .div = 34,
+ },
+ },
+ {
+ .name = "fi2c",
+ .type = UNIPHIER_CLK_TYPE_FIXED_FACTOR,
+ .output_index = 1,
+ .data.factor = {
+ .parent_name = "spll",
+ .mult = 1,
+ .div = 50,
+ },
+ },
+ {
+ .name = "stdmac",
+ .type = UNIPHIER_CLK_TYPE_GATE,
+ .output_index = 7,
+ .data.gate = {
+ .parent_name = NULL,
+ .reg = 0x200c,
+ .mask = BIT(8),
+ .enable_val = BIT(8),
+ },
+ },
+ { /* sentinel */ }
+};
+
+static int uniphier_ld20_clk_probe(struct platform_device *pdev)
+{
+ return uniphier_clk_probe(pdev, uniphier_ld20_clk_data);
+}
+
+static struct platform_driver uniphier_ld20_clk_driver = {
+ .probe = uniphier_ld20_clk_probe,
+ .remove = uniphier_clk_remove,
+ .driver = {
+ .name = "uniphier-ld20-clk",
+ },
+};
+module_platform_driver(uniphier_ld20_clk_driver);
+
+MODULE_AUTHOR("Masahiro Yamada <yamada.masahiro@socionext.com>");
+MODULE_DESCRIPTION("UniPhier PH1-LD20 System Clock Driver");
+MODULE_LICENSE("GPL");
--
1.9.1
Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread
[RFC PATCH 00/21] mfd, clock, reset: add UniPhier clock/reset driver support Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-10 12:00 +0200
[RFC PATCH 14/21] reset: uniphier: add reset driver for UniPhier PH1-Pro4 SoC Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-10 12:00 +0200
[RFC PATCH 11/21] clk: uniphier: add clock driver for Peripheral block on UniPhier SoCs Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-10 12:00 +0200
[RFC PATCH 19/21] reset: uniphier: add reset driver for UniPhier PH1-LD20 SoC Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-10 12:00 +0200
[RFC PATCH 21/21] reset: uniphier: add reset driver for Peripheral block on UniPhier SoCs Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-10 12:00 +0200
[RFC PATCH 17/21] reset: uniphier: add reset driver for UniPhier ProXstream2/PH1-LD6b SoC Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-10 12:00 +0200
[RFC PATCH 05/21] clk: uniphier: add clock driver for UniPhier PH1-sLD8 SoC Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-10 12:00 +0200
[RFC PATCH 02/21] clk: uniphier: add core support for UniPhier clock driver Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-10 12:00 +0200
[RFC PATCH 10/21] clk: uniphier: add clock driver for Media I/O block on UniPhier SoCs Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-10 12:00 +0200
[RFC PATCH 01/21] mfd: uniphier: add UniPhier MFD driver Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-10 12:00 +0200
Re: [RFC PATCH 01/21] mfd: uniphier: add UniPhier MFD driver Lee Jones <lee.jones@linaro.org> - 2016-05-10 13:30 +0200
Re: [RFC PATCH 01/21] mfd: uniphier: add UniPhier MFD driver Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-11 04:00 +0200
Re: [RFC PATCH 01/21] mfd: uniphier: add UniPhier MFD driver Lee Jones <lee.jones@linaro.org> - 2016-05-11 09:40 +0200
[RFC PATCH 07/21] clk: uniphier: add clock driver for UniPhier ProXstream2/PH1-LD6b SoC Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-10 12:00 +0200
[RFC PATCH 09/21] clk: uniphier: add clock driver for UniPhier PH1-LD20 SoC Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-10 12:00 +0200
[RFC PATCH 06/21] clk: uniphier: add clock driver for UniPhier PH1-Pro5 SoC Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-10 12:00 +0200
[RFC PATCH 15/21] reset: uniphier: add reset driver for UniPhier PH1-sLD8 SoC Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-10 12:00 +0200
[RFC PATCH 16/21] reset: uniphier: add reset driver for UniPhier PH1-Pro5 SoC Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-10 12:00 +0200
[RFC PATCH 18/21] reset: uniphier: add reset driver for UniPhier PH1-LD11 SoC Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-10 12:00 +0200
[RFC PATCH 08/21] clk: uniphier: add clock driver for UniPhier PH1-LD11 SoC Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-10 12:00 +0200
[RFC PATCH 03/21] clk: uniphier: add clock driver for UniPhier PH1-LD4 SoC Masahiro Yamada <yamada.masahiro@socionext.com> - 2016-05-10 12:10 +0200
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