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Re: [PATCH v2] clk: ingenic: Allow divider value to be divided

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On 05/09, Harvey Hunt wrote:
> The JZ4780's MSC clock divider registers multiply the clock divider by 2.
> This means that MMC devices run at half their expected speed. Add the
> ability to divide the clock divider in order to solve this.
> 
> Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com>
> 
> Cc: Paul Burton <paul.burton@imgtec.com>
> Cc: Ralf Baechle <ralf@linux-mips.org> 
> Cc: linux-clk@vger.kernel.org 
> Cc: linux-kernel@vger.kernel.org 
> ---

Applied to clk-next

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[PATCH v2] clk: ingenic: Allow divider value to be divided Harvey Hunt <harvey.hunt@imgtec.com> - 2016-05-09 18:40 +0200
  Re: [PATCH v2] clk: ingenic: Allow divider value to be divided Stephen Boyd <sboyd@codeaurora.org> - 2016-05-10 01:30 +0200

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