[PATCH v2] Workaround for Broadcom NS2 gicv2m implementation

From	Ray Jui <ray.jui@broadcom.com>
Newsgroups	linux.kernel
Subject	[PATCH v2] Workaround for Broadcom NS2 gicv2m implementation
Date	2016-05-05 01:50 +0200
Message-ID	<rveIh-5cS-1@gated-at.bofh.it> (permalink)
Organization	linux.* mail to news gateway

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Alex Barba <alex.barba@broadcom.com> discovered Broadcom NS2 GICv2m
implementation has an erratum where the MSI data needs to be the SPI number
subtracted by an offset of 32, for the correct MSI interrupt to be triggered.

We are now implementating the workaround based on readings from the MSI_IIDR
register.

Patch series is developed based on Linux v4.6-rc1 and available at:
https://github.com/Broadcom/arm64-linux/tree/gicv2m-iproc-v2

Changes from v1:
 - Changed from DT based approach to the approch similar to APM that is based
on readings from the MSI_IIDR register

Ray Jui (1):
  irqchip/gic-v2m: Add workaround for Broadcom NS2 GICv2m erratum

 drivers/irqchip/irq-gic-v2m.c | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

-- 
2.1.4

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[PATCH v2] Workaround for Broadcom NS2 gicv2m implementation Ray Jui <ray.jui@broadcom.com> - 2016-05-05 01:50 +0200
  [PATCH v2] irqchip/gic-v2m: Add workaround for Broadcom NS2 GICv2m erratum Ray Jui <ray.jui@broadcom.com> - 2016-05-05 01:50 +0200
    Re: [PATCH v2] irqchip/gic-v2m: Add workaround for Broadcom NS2  GICv2m erratum Marc Zyngier <marc.zyngier@arm.com> - 2016-05-05 09:40 +0200
      Re: [PATCH v2] irqchip/gic-v2m: Add workaround for Broadcom NS2  GICv2m erratum Ray Jui <ray.jui@broadcom.com> - 2016-05-05 18:20 +0200

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