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Groups > linux.kernel > #1393696
| From | Krzysztof Kozlowski <krzk@kernel.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [RFC PATCH 01/12] dt-bindings: clock: Add license and reformat Exynos5410 clock IDs |
| Date | 2016-05-03 20:00 +0200 |
| Message-ID | <ruMM3-41x-29@gated-at.bofh.it> (permalink) |
| References | <ruMM2-41x-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Add license and copyrights (file introduced in 2014) to header with Exynos5410 clock IDs. Additionally reformat it to improve readability. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- include/dt-bindings/clock/exynos5410.h | 54 ++++++++++++++++++++-------------- 1 file changed, 32 insertions(+), 22 deletions(-) diff --git a/include/dt-bindings/clock/exynos5410.h b/include/dt-bindings/clock/exynos5410.h index 9b180f032e2d..213f19e02870 100644 --- a/include/dt-bindings/clock/exynos5410.h +++ b/include/dt-bindings/clock/exynos5410.h @@ -1,33 +1,43 @@ +/* + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Device Tree binding constants for Exynos5421 clock controller. +*/ + #ifndef _DT_BINDINGS_CLOCK_EXYNOS_5410_H #define _DT_BINDINGS_CLOCK_EXYNOS_5410_H /* core clocks */ -#define CLK_FIN_PLL 1 -#define CLK_FOUT_APLL 2 -#define CLK_FOUT_CPLL 3 -#define CLK_FOUT_MPLL 4 -#define CLK_FOUT_BPLL 5 -#define CLK_FOUT_KPLL 6 +#define CLK_FIN_PLL 1 +#define CLK_FOUT_APLL 2 +#define CLK_FOUT_CPLL 3 +#define CLK_FOUT_MPLL 4 +#define CLK_FOUT_BPLL 5 +#define CLK_FOUT_KPLL 6 /* gate for special clocks (sclk) */ -#define CLK_SCLK_UART0 128 -#define CLK_SCLK_UART1 129 -#define CLK_SCLK_UART2 130 -#define CLK_SCLK_UART3 131 -#define CLK_SCLK_MMC0 132 -#define CLK_SCLK_MMC1 133 -#define CLK_SCLK_MMC2 134 +#define CLK_SCLK_UART0 128 +#define CLK_SCLK_UART1 129 +#define CLK_SCLK_UART2 130 +#define CLK_SCLK_UART3 131 +#define CLK_SCLK_MMC0 132 +#define CLK_SCLK_MMC1 133 +#define CLK_SCLK_MMC2 134 /* gate clocks */ -#define CLK_UART0 257 -#define CLK_UART1 258 -#define CLK_UART2 259 -#define CLK_UART3 260 -#define CLK_MCT 315 -#define CLK_MMC0 351 -#define CLK_MMC1 352 -#define CLK_MMC2 353 +#define CLK_UART0 257 +#define CLK_UART1 258 +#define CLK_UART2 259 +#define CLK_UART3 260 +#define CLK_MCT 315 +#define CLK_MMC0 351 +#define CLK_MMC1 352 +#define CLK_MMC2 353 -#define CLK_NR_CLKS 512 +#define CLK_NR_CLKS 512 #endif /* _DT_BINDINGS_CLOCK_EXYNOS_5410_H */ -- 2.5.0
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[RFC PATCH 00/12] ARM: dts: exynos: Reorganize before adding Odroid XU board Krzysztof Kozlowski <krzk@kernel.org> - 2016-05-03 20:00 +0200
[RFC PATCH 01/12] dt-bindings: clock: Add license and reformat Exynos5410 clock IDs Krzysztof Kozlowski <krzk@kernel.org> - 2016-05-03 20:00 +0200
[RFC PATCH 03/12] ARM: dts: exynos: Re-order alphabetically Exynos5420 SD0/SD1 pinctrl nodes Krzysztof Kozlowski <krzk@kernel.org> - 2016-05-03 20:00 +0200
[RFC PATCH 07/12] ARM: dts: exynos: Move common nodes to exynos5.dtsi Krzysztof Kozlowski <krzk@kernel.org> - 2016-05-03 20:00 +0200
[RFC PATCH 05/12] ARM: dts: exynos: Configure Exynos5410 pinctrl for eMMC and SD card Krzysztof Kozlowski <krzk@kernel.org> - 2016-05-03 20:00 +0200
Re: [RFC PATCH 05/12] ARM: dts: exynos: Configure Exynos5410 pinctrl for eMMC and SD card Alim Akhtar <alim.akhtar@gmail.com> - 2016-05-07 07:00 +0200
Re: [RFC PATCH 05/12] ARM: dts: exynos: Configure Exynos5410 pinctrl for eMMC and SD card Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2016-05-07 11:50 +0200
[RFC PATCH 08/12] ARM: dts: exynos: Prepare for inclusion of exynos5.dtsi in exynos5410.dtsi Krzysztof Kozlowski <krzk@kernel.org> - 2016-05-03 20:00 +0200
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