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Re: [PATCH V3 13/18] coresight: tmc: make sysFS and Perf mode mutually exclusive

From Mathieu Poirier <mathieu.poirier@linaro.org>
Newsgroups linux.kernel
Subject Re: [PATCH V3 13/18] coresight: tmc: make sysFS and Perf mode mutually exclusive
Date 2016-04-25 17:10 +0200
Message-ID <rrQj8-80L-9@gated-at.bofh.it> (permalink)
References <rqMUh-5Du-3@gated-at.bofh.it> <rqMUj-5Du-29@gated-at.bofh.it> <rrPQ8-7se-63@gated-at.bofh.it> <rrPZL-7wH-3@gated-at.bofh.it> <rrQ9s-7Bm-35@gated-at.bofh.it>
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On 25 April 2016 at 08:52, Suzuki K Poulose <Suzuki.Poulose@arm.com> wrote:
> On 25/04/16 15:48, Mathieu Poirier wrote:
>>
>> On 25 April 2016 at 08:32, Suzuki K Poulose <Suzuki.Poulose@arm.com>
>> wrote:
>>>
>>> On 22/04/16 18:14, Mathieu Poirier wrote:
>
>
>>>> +       spin_lock_irqsave(&drvdata->spinlock, flags);
>>>> +       if (drvdata->reading) {
>>>> +               ret = -EINVAL;
>>>> +               goto out;
>>>> +       }
>>>> +
>>>> +       val = local_xchg(&drvdata->mode, mode);
>>>> +       /*
>>>> +        * In Perf mode there can be only one writer per sink.  There
>>>> +        * is also no need to continue if the ETR is already operated
>>>> +        * from sysFS.
>>>> +        */
>>>> +       if (val != CS_MODE_DISABLED) {
>>>
>>>
>>>
>>> Could val be CS_MODE_PERF ? In other words, should we be checking :
>>>          if (val == CS_MODE_SYSFS)  instead ?
>>
>>
>> If we check for CS_MODE_SYSFS we also have to check for CS_MODE_PERF,
>> which is two checks rather than a single one with the current
>> solution.
>
>
> I am confused now. The comment says, we want to check for sysfs mode and
> don't continue in that case. So, we shouldn't be worried about PERF mode.

You are correct about the sysFS part, but the first sentence of the
comment also mention that in perf mode there can only be one writer
per sink.  Otherwise ring buffers for one session would end up with
traces from other ongoing sessions, and that is not taking into
account the buffer management nightmares it would cause.

Mathieu

>
> Suzuki
>
>

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Thread

[PATCH V3 00/18] coresight: tmc: make driver usable by Perf  Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-22 19:20 +0200
  [PATCH V3 06/18] coresight: tmc: cleaning up header file Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-22 19:20 +0200
  [PATCH V3 18/18] coresight: configuring ETF in FIFO mode when acting as link Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-22 19:20 +0200
  [PATCH V3 13/18] coresight: tmc: make sysFS and Perf mode mutually exclusive Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-22 19:20 +0200
    Re: [PATCH V3 13/18] coresight: tmc: make sysFS and Perf mode  mutually exclusive Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-04-25 16:40 +0200
      Re: [PATCH V3 13/18] coresight: tmc: make sysFS and Perf mode  mutually exclusive Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-25 16:50 +0200
        Re: [PATCH V3 13/18] coresight: tmc: make sysFS and Perf mode  mutually exclusive Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-04-25 17:00 +0200
          Re: [PATCH V3 13/18] coresight: tmc: make sysFS and Perf mode  mutually exclusive Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-25 17:10 +0200
            Re: [PATCH V3 13/18] coresight: tmc: make sysFS and Perf mode  mutually exclusive Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-25 17:20 +0200
              Re: [PATCH V3 13/18] coresight: tmc: make sysFS and Perf mode  mutually exclusive Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-04-26 11:30 +0200
            Re: [PATCH V3 13/18] coresight: tmc: make sysFS and Perf mode  mutually exclusive Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-04-25 17:20 +0200
  [PATCH V3 01/18] coresight: tmc: modifying naming convention Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-22 19:20 +0200
  [PATCH V3 02/18] coresight: tmc: waiting for TMCReady bit before programming Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-22 19:20 +0200
  [PATCH V3 04/18] coresight: tmc: clearly define number of transfers per burst Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-22 19:20 +0200
  [PATCH V3 07/18] coresight: tmc: splitting driver in ETB/ETF and ETR components Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-22 19:20 +0200
  [PATCH V3 03/18] coresight: tmc: re-implementing tmc_read_prepare/unprepare() functions Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-22 19:20 +0200
  [PATCH V3 15/18] coresight: moving struct cs_buffers to header file Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-22 19:20 +0200
  [PATCH V3 05/18] coresight: tmc: introducing new header file Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-22 19:20 +0200

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