Re: [PATCH V2 04/15] coresight: tmc: introducing new header file

From	Suzuki K Poulose <Suzuki.Poulose@arm.com>
Newsgroups	linux.kernel
Subject	Re: [PATCH V2 04/15] coresight: tmc: introducing new header file
Date	2016-04-15 18:10 +0200
Message-ID	<roetI-5Ly-35@gated-at.bofh.it> (permalink)
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On 15/04/16 17:03, Mathieu Poirier wrote:
> On 14 April 2016 at 11:33, Suzuki K Poulose <Suzuki.Poulose@arm.com> wrote:
>> On 12/04/16 18:54, Mathieu Poirier wrote:
>>>
>>> The amount of #define, enumeration and structure definition
>>> is big enough to justify moving them to a new header file.
>>>
>>
>>
>>> +/* TMC_STS - 0x00C */
>>> +#define TMC_STS_TRIGGERED      BIT(1)
>>
>>
>> ...
>>
>>> +#define TMC_AXICTL_WR_BURST_LEN 0xF00
>>
>>
>> Nit: The value above signifies, 16 data transfers per burst.
>> So ideally it would be good to rename it to reflect that. say,
>>
>> TMC_AXICTL_WR_BURST_16
>
> Will do.  But I'll have to do this in a separate patch then the
> grouping of STS_ and FFCR_ defines you're referring to below since it
> will also require changes to the .c files.

Yes, I don't expect this change to be part of the patch. Separate patch
is fine.

>
>>
>>
>>
>>> +/* TMC_FFCR - 0x304 */
>>> +#define TMC_FFCR_EN_FMT                BIT(0)
>>> +#define TMC_FFCR_EN_TI         BIT(1)
>>> +#define TMC_FFCR_FON_FLIN      BIT(4)
>>> +#define TMC_FFCR_FON_TRIG_EVT  BIT(5)
>>> +#define TMC_FFCR_FLUSHMAN      BIT(6)
>>> +#define TMC_FFCR_TRIGON_TRIGIN BIT(8)
>>> +#define TMC_FFCR_STOP_ON_FLUSH BIT(12)
>>> +
>>> +#define TMC_STS_TMCREADY_BIT   2
>>
>>
>>> +#define TMC_FFCR_FLUSHMAN_BIT  6
>>
>>
>> nit: It would be nice to group the STS_ and FFCR_ bits together.
>> Also I see that the defintion for
>> TMC_STS_FULL is added in a completely unrelated patch (TMC-ETF AUX SPACE
>> patch ?). It would be good to add it either here or in a different patch.
>
> TMC_STS_FULL is not added here because at this point it is not used by
> the code - it is only added later when it is useful.

I agree. But the patch which introduces the definition doesn't deal with
TMC_STS_ at all either. Thats why I said, either here or in a different patch
than what is there. May be you could club the change above and the STS_FULL
into a new single patch. Its not mandatory though.

Suzuki

Thread

[PATCH V2 00/15] coresight: tmc: make driver usable by Perf  Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-12 20:00 +0200
  [PATCH V2 02/15] coresight: tmc: waiting for TMCReady bit before programming Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-12 20:00 +0200
    Re: [PATCH V2 02/15] coresight: tmc: waiting for TMCReady bit before  programming Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-04-14 19:10 +0200
  [PATCH V2 15/15] coresight: configuring ETF in FIFO mode when acting as link Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-12 20:00 +0200
    Re: [PATCH V2 15/15] coresight: configuring ETF in FIFO mode when  acting as link Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-04-21 15:00 +0200
  [PATCH V2 04/15] coresight: tmc: introducing new header file Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-12 20:00 +0200
    Re: [PATCH V2 04/15] coresight: tmc: introducing new header file Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-04-14 19:40 +0200
      Re: [PATCH V2 04/15] coresight: tmc: introducing new header file Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-15 18:10 +0200
        Re: [PATCH V2 04/15] coresight: tmc: introducing new header file Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-04-15 18:10 +0200
          Re: [PATCH V2 04/15] coresight: tmc: introducing new header file Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-15 18:20 +0200
            Re: [PATCH V2 04/15] coresight: tmc: introducing new header file Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-04-15 18:20 +0200
  [PATCH V2 05/15] coresight: tmc: splitting driver in ETB/ETF and ETR components Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-12 20:00 +0200
    Re: [PATCH V2 05/15] coresight: tmc: splitting driver in ETB/ETF and  ETR components Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-04-19 14:30 +0200
      Re: [PATCH V2 05/15] coresight: tmc: splitting driver in ETB/ETF and  ETR components Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-19 17:20 +0200
  [PATCH V2 08/15] coresight: tmc: getting the right read_count on tmc_open() Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-12 20:00 +0200
    Re: [PATCH V2 08/15] coresight: tmc: getting the right read_count on  tmc_open() Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-04-19 15:10 +0200
  [PATCH V2 12/15] coresight: tmc: keep track of memory width Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-12 20:00 +0200
    Re: [PATCH V2 12/15] coresight: tmc: keep track of memory width Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-04-14 13:20 +0200
      Re: [PATCH V2 12/15] coresight: tmc: keep track of memory width Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-15 18:20 +0200
  [PATCH V2 13/15] coresight: tmc: implementing TMC-ETF AUX space API Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-12 20:00 +0200
    Re: [PATCH V2 13/15] coresight: tmc: implementing TMC-ETF AUX space  API Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-04-19 18:20 +0200
      Re: [PATCH V2 13/15] coresight: tmc: implementing TMC-ETF AUX space API Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-04-19 18:50 +0200
        Re: [PATCH V2 13/15] coresight: tmc: implementing TMC-ETF AUX space  API Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-04-19 19:00 +0200

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