Re: [PATCH v1 12/12] serial: 8250_lpss: enable DMA on Intel Quark UART

From	Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Newsgroups	linux.kernel
Subject	Re: [PATCH v1 12/12] serial: 8250_lpss: enable DMA on Intel Quark UART
Date	2016-04-13 14:10 +0200
Message-ID	<rnrMn-116-47@gated-at.bofh.it> (permalink)
References	(2 earlier) <rmM6w-87k-69@gated-at.bofh.it> <rmMpQ-8jk-43@gated-at.bofh.it> <rn9mq-1RY-5@gated-at.bofh.it> <rn9FL-22N-1@gated-at.bofh.it> <rnr9E-rU-13@gated-at.bofh.it>
Organization	Intel Finland Oy

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On Wed, 2016-04-13 at 12:22 +0100, Bryan O'Donoghue wrote:
> On Tue, 2016-04-12 at 19:50 +0300, Andy Shevchenko wrote:
> > 
> > > 
> > > I haven't read your V2 yet but on this, I'd suggest raising the
> > burst
> > > 
> > > size to 32 bytes for UART (no higher) we found during bringup that
> > > larger sizes "fall-over and die" but, anything up to 32 bytes is
> > > OK
> > -
> > > 
> > > and therefore you should be able to reduce the number of
> > > bursts/interrupts etc.
> > It can't be more that FIFO size and recommendation as far as I know
> > is
> > FIFO/2, which is exactly 8 bytes.
> Why not ?

Because a probability of FIFO overrun.

There is a big chapter ("Peripheral Burst Transaction Requests") in
dw_apb_dmac_db.pdf covering this.

> 
> We went as high as 32 bytes previously in the BSP with no obvious
> errors.
> 
> At 8 bytes or 1/2 of the FIFO size I'd ask the question is DMA even
> worth it i.e. does it take more time to setup and execute a DMA
> transaction @ 1/2 FIFO size than just writing straight into the FIFO ?

-- 
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy

Thread

[PATCH v1 12/12] serial: 8250_lpss: enable DMA on Intel Quark UART Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-04-07 22:40 +0200
  Re: [PATCH v1 12/12] serial: 8250_lpss: enable DMA on Intel Quark  UART Bryan O'Donoghue <pure.logic@nexus-software.ie> - 2016-04-11 17:40 +0200
    Re: [PATCH v1 12/12] serial: 8250_lpss: enable DMA on Intel Quark UART Andy Shevchenko <andy.shevchenko@gmail.com> - 2016-04-11 18:00 +0200
      Re: [PATCH v1 12/12] serial: 8250_lpss: enable DMA on Intel Quark UART Andy Shevchenko <andy.shevchenko@gmail.com> - 2016-04-11 18:10 +0200
      Re: [PATCH v1 12/12] serial: 8250_lpss: enable DMA on Intel Quark  UART Bryan O'Donoghue <pure.logic@nexus-software.ie> - 2016-04-12 18:30 +0200
        Re: [PATCH v1 12/12] serial: 8250_lpss: enable DMA on Intel Quark  UART Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-04-12 18:50 +0200
          Re: [PATCH v1 12/12] serial: 8250_lpss: enable DMA on Intel Quark  UART Bryan O'Donoghue <pure.logic@nexus-software.ie> - 2016-04-13 13:30 +0200
            Re: [PATCH v1 12/12] serial: 8250_lpss: enable DMA on Intel Quark  UART Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-04-13 14:10 +0200
              Re: [PATCH v1 12/12] serial: 8250_lpss: enable DMA on Intel Quark  UART Bryan O'Donoghue <pure.logic@nexus-software.ie> - 2016-04-13 16:40 +0200
                Re: [PATCH v1 12/12] serial: 8250_lpss: enable DMA on Intel Quark  UART Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-04-13 16:50 +0200
                Re: [PATCH v1 12/12] serial: 8250_lpss: enable DMA on Intel Quark  UART Bryan O'Donoghue <pure.logic@nexus-software.ie> - 2016-04-13 17:30 +0200

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