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[PATCH v7 6/9] reset: mediatek: Add MT2701 reset driver

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From: Shunli Wang <shunli.wang@mediatek.com>

In infrasys and perifsys, there are many reset
control bits for kinds of modules. These bits are
used as actual reset controllers to be registered
into kernel's generic reset controller framework.

Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Tested-by: John Crispin <blogic@openwrt.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
---
 drivers/clk/mediatek/clk-mt2701.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/clk/mediatek/clk-mt2701.c b/drivers/clk/mediatek/clk-mt2701.c
index b4db141..9542e47 100644
--- a/drivers/clk/mediatek/clk-mt2701.c
+++ b/drivers/clk/mediatek/clk-mt2701.c
@@ -763,6 +763,8 @@ static void __init mtk_infrasys_init(struct device_node *node)
 	if (r)
 		pr_err("%s(): could not register clock provider: %d\n",
 			__func__, r);
+
+	mtk_register_reset_controller(node, 2, 0x30);
 }
 CLK_OF_DECLARE(mtk_infrasys, "mediatek,mt2701-infracfg", mtk_infrasys_init);
 
@@ -884,6 +886,8 @@ static void __init mtk_pericfg_init(struct device_node *node)
 	if (r)
 		pr_err("%s(): could not register clock provider: %d\n",
 			__func__, r);
+
+	mtk_register_reset_controller(node, 2, 0x0);
 }
 CLK_OF_DECLARE(mtk_pericfg, "mediatek,mt2701-pericfg", mtk_pericfg_init);
 
@@ -1096,6 +1100,8 @@ static void __init mtk_hifsys_init(struct device_node *node)
 	if (r)
 		pr_err("%s(): could not register clock provider: %d\n",
 			__func__, r);
+
+	mtk_register_reset_controller(node, 1, 0x34);
 }
 
 static const struct mtk_gate_regs eth_cg_regs __initconst = {
-- 
1.9.1

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[PATCH v7 0/9] Add clock support for Mediatek MT2701  James Liao <jamesjj.liao@mediatek.com> - 2016-04-14 10:20 +0200
  [PATCH v7 9/9] arm: dts: mt2701: Add clock controller device nodes James Liao <jamesjj.liao@mediatek.com> - 2016-04-14 10:20 +0200
  [PATCH v7 7/9] clk: mediatek: Enable critical clocks for MT2701 James Liao <jamesjj.liao@mediatek.com> - 2016-04-14 10:20 +0200
  [PATCH v7 8/9] clk: mediatek: Add config options for MT2701 subsystem clocks James Liao <jamesjj.liao@mediatek.com> - 2016-04-14 10:20 +0200
  [PATCH v7 1/9] clk: mediatek: Refine the makefile to support multiple clock drivers James Liao <jamesjj.liao@mediatek.com> - 2016-04-14 10:20 +0200
  [PATCH v7 5/9] reset: mediatek: Add MT2701 reset controller dt-binding file James Liao <jamesjj.liao@mediatek.com> - 2016-04-14 10:20 +0200
  [PATCH v7 6/9] reset: mediatek: Add MT2701 reset driver James Liao <jamesjj.liao@mediatek.com> - 2016-04-14 10:30 +0200
  [PATCH v7 2/9] dt-bindings: ARM: Mediatek: Document bindings for MT2701 James Liao <jamesjj.liao@mediatek.com> - 2016-04-14 10:30 +0200
  [PATCH v7 3/9] clk: mediatek: Add dt-bindings for MT2701 clocks James Liao <jamesjj.liao@mediatek.com> - 2016-04-14 10:30 +0200

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