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[PATCH v3 2/6] dmaengine: qcom: bam_dma: clear BAM interrupt only if it is raised

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Currently we write BAM_IRQ_CLR register with zero even when no
BAM_IRQ occured. This write has some bad side effects when the
BAM instance is for the crypto engine. In case of crypto engine
some of the BAM registers are xPU protected and they cannot be
controlled by the driver.

Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Reviewed-by: Andy Gross <andy.gross@linaro.org>
Tested-by: Pramod Gurav <gpramod@codeaurora.org>
---
 drivers/dma/qcom/bam_dma.c |   12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/dma/qcom/bam_dma.c b/drivers/dma/qcom/bam_dma.c
index a486bc0f82e0..789d5f836bf7 100644
--- a/drivers/dma/qcom/bam_dma.c
+++ b/drivers/dma/qcom/bam_dma.c
@@ -801,13 +801,17 @@ static irqreturn_t bam_dma_irq(int irq, void *data)
 	if (srcs & P_IRQ)
 		tasklet_schedule(&bdev->task);
 
-	if (srcs & BAM_IRQ)
+	if (srcs & BAM_IRQ) {
 		clr_mask = readl_relaxed(bam_addr(bdev, 0, BAM_IRQ_STTS));
 
-	/* don't allow reorder of the various accesses to the BAM registers */
-	mb();
+		/*
+		 * don't allow reorder of the various accesses to the BAM
+		 * registers
+		 */
+		mb();
 
-	writel_relaxed(clr_mask, bam_addr(bdev, 0, BAM_IRQ_CLR));
+		writel_relaxed(clr_mask, bam_addr(bdev, 0, BAM_IRQ_CLR));
+	}
 
 	return IRQ_HANDLED;
 }
-- 
1.7.9.5

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[PATCH v3 0/6] bam dma fixes and one dt extension Stanimir Varbanov <stanimir.varbanov@linaro.org> - 2016-04-11 10:40 +0200
  [PATCH v3 2/6] dmaengine: qcom: bam_dma: clear BAM interrupt only if it is raised Stanimir Varbanov <stanimir.varbanov@linaro.org> - 2016-04-11 10:40 +0200
  [PATCH v3 3/6] dmaengine: qcom: bam_dma: document controlled-remotely dt property Stanimir Varbanov <stanimir.varbanov@linaro.org> - 2016-04-11 10:40 +0200
  [PATCH v3 6/6] dmaengine: qcom: bam_dma: rename BAM_MAX_DATA_SIZE define Stanimir Varbanov <stanimir.varbanov@linaro.org> - 2016-04-11 10:50 +0200
    Re: [PATCH v3 6/6] dmaengine: qcom: bam_dma: rename  BAM_MAX_DATA_SIZE define Andy Gross <andy.gross@linaro.org> - 2016-04-13 00:10 +0200
  [PATCH v3 5/6] dmaengine: qcom: bam_dma: use correct pipe FIFO size Stanimir Varbanov <stanimir.varbanov@linaro.org> - 2016-04-11 10:50 +0200
  [PATCH v3 4/6] dmaengine: qcom: bam_dma: add controlled-remotely dt property Stanimir Varbanov <stanimir.varbanov@linaro.org> - 2016-04-11 10:50 +0200

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