Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]


Groups > linux.kernel > #1372899

[PATCH] sata_dwc_460ex: fix burst transaction length

From Christian Lamparter <chunkeey@googlemail.com>
Newsgroups linux.kernel
Subject [PATCH] sata_dwc_460ex: fix burst transaction length
Date 2016-04-07 00:50 +0200
Message-ID <rl4qR-2rx-3@gated-at.bofh.it> (permalink)
Organization linux.* mail to news gateway

Show all headers | View raw


According to DesignWare DW_ahb_dmac Databook page 159,
both SRC_MSIZE and DEST_MSIZE values "are not related to
AHB bus mater HBURST bus".

The hardware uses these values as a unit of TR_WIDTHs.
As both TR_WIDTHs are hardcoded to 4 Bytes, the MSIZEs
should be 16, so the burst transaction length will be:
64 Bytes.

Cc: stable@vger.kernel.org
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
---
 drivers/ata/sata_dwc_460ex.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/ata/sata_dwc_460ex.c b/drivers/ata/sata_dwc_460ex.c
index 2fc1516..52f0614 100644
--- a/drivers/ata/sata_dwc_460ex.c
+++ b/drivers/ata/sata_dwc_460ex.c
@@ -58,7 +58,8 @@
 #define NO_IRQ		0
 #endif
 
-#define AHB_DMA_BRST_DFLT	64	/* 16 data items burst length*/
+#define AHB_DMA_BRST_DFLT	64
+#define BRST_TRANS_LEN_DFLT	16
 
 enum {
 	SATA_DWC_MAX_PORTS = 1,
@@ -381,8 +382,8 @@ static struct dma_async_tx_descriptor *dma_dwc_xfer_setup(struct ata_queued_cmd
 	}
 
 	sconf.direction = qc->dma_dir;
-	sconf.src_maxburst = AHB_DMA_BRST_DFLT;
-	sconf.dst_maxburst = AHB_DMA_BRST_DFLT;
+	sconf.src_maxburst = BRST_TRANS_LEN_DFLT;
+	sconf.dst_maxburst = BRST_TRANS_LEN_DFLT;
 	sconf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
 	sconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
 
-- 
2.8.0.rc3

Back to linux.kernel | Previous | NextNext in thread | Find similar | Unroll thread


Thread

[PATCH] sata_dwc_460ex: fix burst transaction length Christian Lamparter <chunkeey@googlemail.com> - 2016-04-07 00:50 +0200
  Re: [PATCH] sata_dwc_460ex: fix burst transaction length Andy Shevchenko <andy.shevchenko@gmail.com> - 2016-04-07 19:40 +0200

csiph-web