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Re: [PATCH v3 1/6] pinctrl: baytrail: Add pin control data structures

From Mika Westerberg <mika.westerberg@linux.intel.com>
Newsgroups linux.kernel
Subject Re: [PATCH v3 1/6] pinctrl: baytrail: Add pin control data structures
Date 2016-03-31 10:10 +0200
Message-ID <riFPZ-20X-33@gated-at.bofh.it> (permalink)
References <ripUS-7fj-9@gated-at.bofh.it> <ripUS-7fj-19@gated-at.bofh.it>
Organization Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo

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On Wed, Mar 30, 2016 at 06:05:30PM +0300, Cristina Ciocan wrote:
> +	PINCTRL_PIN(55, "GPIO_S0_SC[055]"),
> +	PINCTRL_PIN(56, "GPIO_S0_SC[056]"),
> +	PINCTRL_PIN(57, "GPIO_S0_SC[057]"),
> +	PINCTRL_PIN(58, "GPIO_S0_SC[058]"),
> +	PINCTRL_PIN(59, "GPIO_S0_SC[059]"),
> +	PINCTRL_PIN(60, "GPIO_S0_SC[060]"),
> +	PINCTRL_PIN(61, "GPIO_S0_SC[061]"),

You still have these (and all similar [number]) things. IMO this looks
better:

	PINCTRL_PIN(55, "GPIO_S0_SC55"),
	PINCTRL_PIN(56, "GPIO_S0_SC56"),
	PINCTRL_PIN(57, "GPIO_S0_SC57"),
	PINCTRL_PIN(58, "GPIO_S0_SC58"),
	PINCTRL_PIN(59, "GPIO_S0_SC59"),
	PINCTRL_PIN(60, "GPIO_S0_SC60"),
	PINCTRL_PIN(61, "GPIO_S0_SC61"),

but I don't really care that much ;-)

My ack still applies to the whole series.

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Thread

[PATCH v3 0/6] Add pinctrl support for Baytrail Cristina Ciocan <cristina.ciocan@intel.com> - 2016-03-30 17:10 +0200
  [PATCH v3 1/6] pinctrl: baytrail: Add pin control data structures Cristina Ciocan <cristina.ciocan@intel.com> - 2016-03-30 17:10 +0200
    Re: [PATCH v3 1/6] pinctrl: baytrail: Add pin control data structures Mika Westerberg <mika.westerberg@linux.intel.com> - 2016-03-31 10:10 +0200
      Re: [PATCH v3 1/6] pinctrl: baytrail: Add pin control data structures Cristina Ciocan <cristina.ciocan@intel.com> - 2016-04-01 12:50 +0200
      Re: [PATCH v3 1/6] pinctrl: baytrail: Add pin control data structures Linus Walleij <linus.walleij@linaro.org> - 2016-04-01 15:30 +0200
        Re: [PATCH v3 1/6] pinctrl: baytrail: Add pin control data structures Mika Westerberg <mika.westerberg@linux.intel.com> - 2016-04-01 15:40 +0200
  [PATCH v3 5/6] pinctrl: baytrail: Register pin control handling Cristina Ciocan <cristina.ciocan@intel.com> - 2016-03-30 17:10 +0200
  [PATCH v3 3/6] pinctrl: baytrail: Update gpio chip operations Cristina Ciocan <cristina.ciocan@intel.com> - 2016-03-30 17:10 +0200
  [PATCH v3 2/6] pinctrl: baytrail: Add pin control operations Cristina Ciocan <cristina.ciocan@intel.com> - 2016-03-30 17:10 +0200
  [PATCH v3 4/6] pinctrl: baytrail: Update irq chip operations Cristina Ciocan <cristina.ciocan@intel.com> - 2016-03-30 17:10 +0200

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