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Groups > linux.kernel > #1367805
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| From | Len Brown <lenb@kernel.org> |
| Newsgroups | linux.kernel |
| Subject | [PATCH 4/9] x86 tsc_msr: Correct Silvermont reference clock values |
| Date | Thu, 31 Mar 2016 06:20:03 +0200 |
| Message-ID | <riCfp-7Lb-17@gated-at.bofh.it> (permalink) |
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From: Len Brown <len.brown@intel.com>
Atom processors use a 19.2 MHz crystal oscillator.
Early processors generate 100 MHz via 19.2 MHz * 26 / 5 = 99.84 MHz.
Later preocessor generate 100 MHz via 19.2 MHz * 125 / 24 = 100 MHz.
Update the Silvermont-based tables accordingly,
matching the Software Developers Manual.
Also, correct a 166 MHz entry that should have been 116 MHz,
and add a missing 80 MHz entry.
Reported-by: Stephane Gasparini <stephane.gasparini@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
---
arch/x86/kernel/tsc_msr.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c
index 3a866bc..19f2a9a 100644
--- a/arch/x86/kernel/tsc_msr.c
+++ b/arch/x86/kernel/tsc_msr.c
@@ -35,11 +35,11 @@ static struct freq_desc freq_desc_tables[] = {
/* CLV+ */
{ 6, 0x35, 0, { 0, 133200, 0, 0, 0, 99840, 0, 83200 } },
/* TNG - Intel Atom processor Z3400 series */
- { 6, 0x4a, 1, { 0, 99840, 133200, 0, 0, 0, 0, 0 } },
+ { 6, 0x4a, 1, { 0, 100000, 133300, 0, 0, 0, 0, 0 } },
/* VLV2 - Intel Atom processor E3000, Z3600, Z3700 series */
- { 6, 0x37, 1, { 83200, 99840, 133200, 166400, 0, 0, 0, 0 } },
+ { 6, 0x37, 1, { 83300, 100000, 133300, 116700, 80000, 0, 0, 0 } },
/* ANN - Intel Atom processor Z3500 series */
- { 6, 0x5a, 1, { 83200, 99840, 133200, 99840, 0, 0, 0, 0 } },
+ { 6, 0x5a, 1, { 83300, 100000, 133300, 100000, 0, 0, 0, 0 } },
};
static int match_cpu(u8 family, u8 model)
--
2.8.0.rc4.16.g56331f8
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[PATCH 0/9] x86: TSC calibration update Len Brown <lenb@kernel.org> - 2016-03-31 06:20 +0200 [PATCH 6/9] x86 tsc_msr: Extend to include Intel Core Architecture Len Brown <lenb@kernel.org> - 2016-03-31 06:20 +0200 [PATCH 2/9] x86 tsc_msr: Remove debugging messages Len Brown <lenb@kernel.org> - 2016-03-31 06:20 +0200 [PATCH 9/9] x86 tsc: enumerate BXT tsc_khz via CPUID Len Brown <lenb@kernel.org> - 2016-03-31 06:20 +0200 [PATCH 4/9] x86 tsc_msr: Correct Silvermont reference clock values Len Brown <lenb@kernel.org> - 2016-03-31 06:20 +0200 [PATCH 5/9] x86 tsc_msr: Add Airmont reference clock values Len Brown <lenb@kernel.org> - 2016-03-31 06:20 +0200
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