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Groups > linux.kernel > #1364847
| From | Bjorn Andersson <bjorn.andersson@linaro.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 03/17] pinctrl: qcom: ipq4019: fix register offsets |
| Date | 2016-03-25 22:40 +0100 |
| Message-ID | <rgHCy-7Rl-13@gated-at.bofh.it> (permalink) |
| References | <rfZ8u-1se-3@gated-at.bofh.it> <rfZ8u-1se-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Wed 23 Mar 15:04 PDT 2016, Matthew McClintock wrote: > For this SoC the register offsets changed from previous versions to be > separated by a larger amount. > > CC: linus.walleij@linaro.org So the HW guys changed the register layout of the TLMM block? Matches the layout of contemporary MSMs, so I see no problems with this. Acked-by: bjorn.andersson@linaro.org Regards, Bjorn > Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> > --- > drivers/pinctrl/qcom/pinctrl-ipq4019.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/pinctrl/qcom/pinctrl-ipq4019.c b/drivers/pinctrl/qcom/pinctrl-ipq4019.c > index cb9f16a..b68ae42 100644 > --- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c > +++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c > @@ -254,11 +254,11 @@ DECLARE_QCA_GPIO_PINS(99); > qca_mux_##f14 \ > }, \ > .nfuncs = 15, \ > - .ctl_reg = 0x1000 + 0x10 * id, \ > - .io_reg = 0x1004 + 0x10 * id, \ > - .intr_cfg_reg = 0x1008 + 0x10 * id, \ > - .intr_status_reg = 0x100c + 0x10 * id, \ > - .intr_target_reg = 0x400 + 0x4 * id, \ > + .ctl_reg = 0x0 + 0x1000 * id, \ > + .io_reg = 0x4 + 0x1000 * id, \ > + .intr_cfg_reg = 0x8 + 0x1000 * id, \ > + .intr_status_reg = 0xc + 0x1000 * id, \ > + .intr_target_reg = 0x8 + 0x1000 * id, \ > .mux_bit = 2, \ > .pull_bit = 0, \ > .drv_bit = 6, \ > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > a Linux Foundation Collaborative Project >
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[PATCH 03/17] pinctrl: qcom: ipq4019: fix register offsets Matthew McClintock <mmcclint@codeaurora.org> - 2016-03-23 23:10 +0100 Re: [PATCH 03/17] pinctrl: qcom: ipq4019: fix register offsets Bjorn Andersson <bjorn.andersson@linaro.org> - 2016-03-25 22:40 +0100 Re: [PATCH 03/17] pinctrl: qcom: ipq4019: fix register offsets Linus Walleij <linus.walleij@linaro.org> - 2016-03-31 12:00 +0200
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