[PATCH 05/17] clk: qcom: ipq4019: add some fixed clocks for ddrppl and fepll

From	Matthew McClintock <mmcclint@codeaurora.org>
Newsgroups	linux.kernel
Subject	[PATCH 05/17] clk: qcom: ipq4019: add some fixed clocks for ddrppl and fepll
Date	2016-03-23 23:10 +0100
Message-ID	<rfZ8u-1se-7@gated-at.bofh.it> (permalink)
References	<rfZ8u-1se-3@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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Drivers for these don't exist yet so we will add them as fixed clocks
so we don't BUG() if we change clocks that reference these clocks.

Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
---
 drivers/clk/qcom/gcc-ipq4019.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/clk/qcom/gcc-ipq4019.c b/drivers/clk/qcom/gcc-ipq4019.c
index 38ada8d..f0b0a5a 100644
--- a/drivers/clk/qcom/gcc-ipq4019.c
+++ b/drivers/clk/qcom/gcc-ipq4019.c
@@ -1316,6 +1316,16 @@ MODULE_DEVICE_TABLE(of, gcc_ipq4019_match_table);
 
 static int gcc_ipq4019_probe(struct platform_device *pdev)
 {
+	struct device *dev = &pdev->dev;
+
+	clk_register_fixed_rate(dev, "fepll125", "xo", 0, 200000000);
+	clk_register_fixed_rate(dev, "fepll125dly", "xo", 0, 200000000);
+	clk_register_fixed_rate(dev, "fepllwcss2g", "xo", 0, 200000000);
+	clk_register_fixed_rate(dev, "fepllwcss5g", "xo", 0, 200000000);
+	clk_register_fixed_rate(dev, "fepll200", "xo", 0, 200000000);
+	clk_register_fixed_rate(dev, "fepll500", "xo", 0, 200000000);
+	clk_register_fixed_rate(dev, "ddrpllapss", "xo", 0, 666000000);
+
 	return qcom_cc_probe(pdev, &gcc_ipq4019_desc);
 }
 
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

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[PATCH 05/17] clk: qcom: ipq4019: add some fixed clocks for ddrppl and fepll Matthew McClintock <mmcclint@codeaurora.org> - 2016-03-23 23:10 +0100
  Re: [PATCH 05/17] clk: qcom: ipq4019: add some fixed clocks for  ddrppl and fepll Stephen Boyd <sboyd@codeaurora.org> - 2016-03-30 01:40 +0200

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