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Re: [PATCH 01/14] coresight: tmc: modifying naming convention

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On 22/03/16 20:23, Mathieu Poirier wrote:
> According to the TMC architectural state machine, the 'stopped'
> state is reached when bit 2 (TMCReady) of the TMC Status register
> turns to '1'.  The code is correct but the naming convention isn't.
>
> The 'Triggered' bit occupies position '1' of the TMC Status register
> and has nothing to do with the indication of the TMC entering the
> stopped state. As such renaming function "tmc_wait_for_triggered()"
> and changing the #define to reflect what the code is really doing.
>
> This patch has no effect other than clarifying the semantic.
>
> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>

> -	tmc_wait_for_ready(drvdata);
> +	tmc_wait_for_tmcready(drvdata);

Thanks for cleaning this up. The code was indeed confusing.

Suzuki

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[PATCH 00/14] coresight: tmc: make driver usable by Perf  Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-03-22 21:30 +0100
  [PATCH 12/14] coresight: tmc: implementing TMC-ETF AUX space API Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-03-22 21:30 +0100
  [PATCH 14/14] coresight: configuring ETF in FIFO mode when acting as link Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-03-22 21:30 +0100
  [PATCH 11/14] coresight: tmc: keep track of memory width Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-03-22 21:30 +0100
  [PATCH 07/14] coresight: tmc: making disable function reusable Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-03-22 21:30 +0100
  [PATCH 08/14] coresight: tmc: allocating memory when needed Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-03-22 21:30 +0100
  [PATCH 05/14] coresight: tmc: splitting driver in ETB/ETF and ETR components Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-03-22 21:30 +0100
  [PATCH 09/14] coresight: tmc: adding mode of operation for link/sinks Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-03-22 21:30 +0100
  [PATCH 02/14] coresight: tmc: waiting for TMCReady bit before programming Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-03-22 21:30 +0100
  [PATCH 01/14] coresight: tmc: modifying naming convention Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-03-22 21:30 +0100
    Re: [PATCH 01/14] coresight: tmc: modifying naming convention "Suzuki K. Poulose" <Suzuki.Poulose@arm.com> - 2016-03-23 11:40 +0100
  [PATCH 03/14] coresight: tmc: re-implementing tmc_read_prepare/unprepare() functions Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-03-22 21:30 +0100
    Re: [PATCH 03/14] coresight: tmc: re-implementing  tmc_read_prepare/unprepare() functions "Suzuki K. Poulose" <Suzuki.Poulose@arm.com> - 2016-03-23 11:40 +0100
      Re: [PATCH 03/14] coresight: tmc: re-implementing tmc_read_prepare/unprepare()  functions Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-03-24 17:40 +0100
      Re: [PATCH 03/14] coresight: tmc: re-implementing tmc_read_prepare/unprepare()  functions Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-03-24 20:20 +0100
  [PATCH 13/14] coresight: tmc: implementing TMC-ETR AUX space API Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-03-22 21:30 +0100
  [PATCH 04/14] coresight: tmc: introducing new header file Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-03-22 21:30 +0100
  [PATCH 10/14] coresight: tmc: make sysFS and Perf mode mutually exclusive Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-03-22 21:30 +0100
  [PATCH 06/14] coresight: tmc: making prepare/unprepare functions generic Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-03-22 21:30 +0100

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