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Re: NVMEM usage question

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On Mon, 14 Mar 2016, Eddie Huang wrote:
> 
> Mediatek PMIC chip have some spare registers used to store information.
> The value of these registers will exist until user unplug battery or
> battery depletion. One of our usage example is store battery utilization

i.e. like battery-backed raid caches.

> in these spare registers. We want to implement NVMEM driver to
> read/write sparse registers, but binding document describe NVMEM is for
> "Non-volatile memory", and for hardware like eeprom, efuse. Since the

Users will expect nvmem to not go away on battery drain, so I don't think it
would be the best fit, semantically speaking.

Unless this is common enough that it would make sense to have a generic
quasi-non-volatile profile for nvmem, and publish that constraint to
userspace in a standard way...

-- 
  "One disk to rule them all, One disk to find them. One disk to bring
  them all and in the darkness grind them. In the Land of Redmond
  where the shadows lie." -- The Silicon Valley Tarot
  Henrique Holschuh

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NVMEM usage question Eddie Huang <eddie.huang@mediatek.com> - 2016-03-14 13:10 +0100
  Re: NVMEM usage question Srinivas Kandagatla <srinivas.kandagatla@linaro.org> - 2016-03-16 08:00 +0100
  Re: NVMEM usage question Henrique de Moraes Holschuh <hmh@hmh.eng.br> - 2016-03-17 17:20 +0100

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