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[PATCH 5/7] dmaengine: xilinx_vdma: Remove unnecessary axi dma device-tree binding doc

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AXI DMA support is added to the existing AXI VDMA driver.
The binding doc for AXI DMA should also be updated in the
VDMA device-tree binding doc.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
---
 .../devicetree/bindings/dma/xilinx/xilinx_dma.txt  | 65 ----------------------
 1 file changed, 65 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt

diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
deleted file mode 100644
index 2291c40..0000000
--- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
+++ /dev/null
@@ -1,65 +0,0 @@
-Xilinx AXI DMA engine, it does transfers between memory and AXI4 stream
-target devices. It can be configured to have one channel or two channels.
-If configured as two channels, one is to transmit to the device and another
-is to receive from the device.
-
-Required properties:
-- compatible: Should be "xlnx,axi-dma-1.00.a"
-- #dma-cells: Should be <1>, see "dmas" property below
-- reg: Should contain DMA registers location and length.
-- dma-channel child node: Should have atleast one channel and can have upto
-	two channels per device. This node specifies the properties of each
-	DMA channel (see child node properties below).
-
-Optional properties:
-- xlnx,include-sg: Tells whether configured for Scatter-mode in
-	the hardware.
-
-Required child node properties:
-- compatible: It should be either "xlnx,axi-dma-mm2s-channel" or
-	"xlnx,axi-dma-s2mm-channel".
-- interrupts: Should contain per channel DMA interrupts.
-- xlnx,datawidth: Should contain the stream data width, take values
-	{32,64...1024}.
-
-Option child node properties:
-- xlnx,include-dre: Tells whether hardware is configured for Data
-	Realignment Engine.
-
-Example:
-++++++++
-
-axi_dma_0: axidma@40400000 {
-	compatible = "xlnx,axi-dma-1.00.a";
-	#dma_cells = <1>;
-	reg = < 0x40400000 0x10000 >;
-	dma-channel@40400000 {
-		compatible = "xlnx,axi-dma-mm2s-channel";
-		interrupts = < 0 59 4 >;
-		xlnx,datawidth = <0x40>;
-	} ;
-	dma-channel@40400030 {
-		compatible = "xlnx,axi-dma-s2mm-channel";
-		interrupts = < 0 58 4 >;
-		xlnx,datawidth = <0x40>;
-	} ;
-} ;
-
-
-* DMA client
-
-Required properties:
-- dmas: a list of <[DMA device phandle] [Channel ID]> pairs,
-	where Channel ID is '0' for write/tx and '1' for read/rx
-	channel.
-- dma-names: a list of DMA channel names, one per "dmas" entry
-
-Example:
-++++++++
-
-dmatest_0: dmatest@0 {
-	compatible ="xlnx,axi-dma-test-1.00.a";
-	dmas = <&axi_dma_0 0
-		&axi_dma_0 1>;
-	dma-names = "dma0", "dma1";
-} ;
-- 
2.1.2

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[PATCH 0/7] dmaengine: xilinx_vdma: AXI DMA's enhancments Kedareswara rao Appana <appana.durga.rao@xilinx.com> - 2016-03-15 18:30 +0100
  [PATCH 5/7] dmaengine: xilinx_vdma: Remove unnecessary axi dma device-tree binding doc Kedareswara rao Appana <appana.durga.rao@xilinx.com> - 2016-03-15 18:30 +0100
    Re: [PATCH 5/7] dmaengine: xilinx_vdma: Remove unnecessary axi dma  device-tree binding doc Moritz Fischer <moritz.fischer@ettus.com> - 2016-03-16 02:40 +0100
      RE: [PATCH 5/7] dmaengine: xilinx_vdma: Remove unnecessary axi dma  device-tree binding doc Appana Durga Kedareswara Rao <appana.durga.rao@xilinx.com> - 2016-03-16 07:10 +0100
  [PATCH 7/7] dmaengine: xilinx_vdma: Add Support for Xilinx AXI Central Direct Memory Access Engine Kedareswara rao Appana <appana.durga.rao@xilinx.com> - 2016-03-15 18:30 +0100
  [PATCH 2/7] dmaengine: xilinx_vdma: Add quirks support to differentiate differnet IP cores Kedareswara rao Appana <appana.durga.rao@xilinx.com> - 2016-03-15 18:30 +0100
    Re: [PATCH 2/7] dmaengine: xilinx_vdma: Add quirks support to  differentiate differnet IP cores Vinod Koul <vinod.koul@intel.com> - 2016-03-16 04:10 +0100
      RE: [PATCH 2/7] dmaengine: xilinx_vdma: Add quirks support to  differentiate differnet IP cores Appana Durga Kedareswara Rao <appana.durga.rao@xilinx.com> - 2016-03-16 07:20 +0100
  Re: [PATCH 0/7] dmaengine: xilinx_vdma: AXI DMA's enhancments Moritz Fischer <moritz.fischer@ettus.com> - 2016-03-16 02:30 +0100
    Re: [PATCH 0/7] dmaengine: xilinx_vdma: AXI DMA's enhancments Vinod Koul <vinod.koul@intel.com> - 2016-03-16 04:10 +0100
      RE: [PATCH 0/7] dmaengine: xilinx_vdma: AXI DMA's enhancments Appana Durga Kedareswara Rao <appana.durga.rao@xilinx.com> - 2016-03-16 07:20 +0100
    RE: [PATCH 0/7] dmaengine: xilinx_vdma: AXI DMA's enhancments Appana Durga Kedareswara Rao <appana.durga.rao@xilinx.com> - 2016-03-16 07:10 +0100

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