Re: [RESEND PATCH v7] mtd: spi-nor: add hisilicon spi-nor flash controller driver

From	Brian Norris <computersforpeace@gmail.com>
Newsgroups	linux.kernel
Subject	Re: [RESEND PATCH v7] mtd: spi-nor: add hisilicon spi-nor flash controller driver
Date	2016-03-09 20:00 +0100
Message-ID	<raRuW-3zK-5@gated-at.bofh.it> (permalink)
References	<r6m6l-q0-3@gated-at.bofh.it> <rae0B-1QO-73@gated-at.bofh.it> <ram7M-7oJ-19@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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On Tue, Mar 08, 2016 at 05:25:13PM +0800, Jiancheng Xue wrote:
> On 2016/3/8 6:52, Brian Norris wrote:
> [...]
> >> +static void hisi_spi_nor_dma_transfer(struct spi_nor *nor, u32 start_off,
> >> +		u32 dma_buf, u32 len, u8 op_type)
> > 
> > Does this controller support 64-bit addresses? What if you see LPAE, or
> > an ARM64 CPU? It'd be nice if you don't truncate potentially 64-bit
> > dma_buf down to u32.
> > 
> > Brian
> > 
> No, this controller just supports 32-bit addresses. So I think I have to truncate 64-bit dma_buf. :(

Then you should handle this proactively. Either some kind of WARN_ON and
error condition, or I think dma_set_mask_and_coherent(dev,
DMA_BIT_MASK(32)) should be able to ensure you get addresses in the
appropriate range?

Brian

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Re: [RESEND PATCH v7] mtd: spi-nor: add hisilicon spi-nor flash  controller driver Brian Norris <computersforpeace@gmail.com> - 2016-03-08 01:50 +0100
  Re: [RESEND PATCH v7] mtd: spi-nor: add hisilicon spi-nor flash  controller driver Jiancheng Xue <xuejiancheng@huawei.com> - 2016-03-08 10:30 +0100
    Re: [RESEND PATCH v7] mtd: spi-nor: add hisilicon spi-nor flash  controller driver Boris Brezillon <boris.brezillon@free-electrons.com> - 2016-03-08 10:50 +0100
      Re: [RESEND PATCH v7] mtd: spi-nor: add hisilicon spi-nor flash  controller driver Jiancheng Xue <xuejiancheng@huawei.com> - 2016-03-09 04:40 +0100
    Re: [RESEND PATCH v7] mtd: spi-nor: add hisilicon spi-nor flash  controller driver Brian Norris <computersforpeace@gmail.com> - 2016-03-09 20:00 +0100

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