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Groups > linux.kernel > #1452011
| From | Bjorn Helgaas <helgaas@kernel.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH] genirq/msi: Make sure PCI MSIs are activated early |
| Date | 2016-07-28 18:50 +0200 |
| Message-ID | <rZWFs-oF-13@gated-at.bofh.it> (permalink) |
| References | (3 earlier) <rYPmG-5Ly-39@gated-at.bofh.it> <rZ922-1qi-15@gated-at.bofh.it> <rZahr-2lS-25@gated-at.bofh.it> <rZbdv-2V0-11@gated-at.bofh.it> <rZV6G-7YK-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Thu, Jul 28, 2016 at 05:03:30PM +0200, Thomas Gleixner wrote: > On Tue, 26 Jul 2016, Thomas Gleixner wrote: > > On Tue, 26 Jul 2016, Thomas Gleixner wrote: > > > On Tue, 26 Jul 2016, Thomas Gleixner wrote: > > > > On Mon, 25 Jul 2016, Bjorn Helgaas wrote: > > > > > On Mon, Jul 25, 2016 at 09:45:13AM +0200, Thomas Gleixner wrote: > > > > > I thought the original issue [1] was that PCI_MSI_FLAGS_ENABLE was being > > > > > written before PCI_MSI_ADDRESS_LO. That doesn't sound like a good > > > > > idea to me. > > > > > > > > Well. That's only a problem if the PCI device does not support masking. But > > > > yes, we missed that case back then. > > > > > > > > > That does seem like a problem. Maybe it would be better to delay > > > > > setting PCI_MSI_FLAGS_ENABLE until after the MSI address & data bits > > > > > have been set? > > > > > > > > I thought about that, but that gets ugly pretty fast. Here is an alternative > > > > solution. > > > > > > > > I think that's the proper place to do it _AFTER_ the hierarchical allocation > > > > took place. On x86 Marc's ACTIVATE_EARLY flag would not work because the > > > > message is not yet ready to be assembled. > > > > > > Actually it works, because the MSI domain is the last one which is running the > > > allocation function. So everything else is initialized already. > > > > > > I'll take Marc's patch with some additional commentry as it turned out to be a > > > workaround for the reported VMware issues with PCI/MSI-X pass through. > > > > Now I digged a little bit deeper into all that PCI/MSI maze. > > > > When a interrupt is freed, then we write the msi message to 0, but the > > PCI_MSI_FLAGS_ENABLE flag is still set. That makes me wonder ... > > Bjorn, any opinion on that? I assume you mean we write 0 to PCI_MSI_ADDRESS_LO, PCI_MSI_DATA_32, and similar registers in the MSI Capability structure. It doesn't sound safe to me to do that while PCI_MSI_FLAGS_ENABLE is still set. I don't see anything in the spec that constrains when a device latches the values from those registers. It seems legal to do it on PCI_MSI_FLAGS_ENABLE transitions, but it also seems legal to do it whenever the device needs to signal an interrupt. If a device does the latter, it seems like clearing PCI_MSI_ADDRESS_LO while PCI_MSI_FLAGS_ENABLE is set could lead to stray DMA writes if the device for some reason signals an interrupt later. Bjorn
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Re: [PATCH] genirq/msi: Make sure PCI MSIs are activated early Thomas Gleixner <tglx@linutronix.de> - 2016-07-26 13:50 +0200
Re: [PATCH] genirq/msi: Make sure PCI MSIs are activated early Thomas Gleixner <tglx@linutronix.de> - 2016-07-26 15:10 +0200
Re: [PATCH] genirq/msi: Make sure PCI MSIs are activated early Thomas Gleixner <tglx@linutronix.de> - 2016-07-26 16:10 +0200
Re: [PATCH] genirq/msi: Make sure PCI MSIs are activated early Thomas Gleixner <tglx@linutronix.de> - 2016-07-28 17:10 +0200
Re: [PATCH] genirq/msi: Make sure PCI MSIs are activated early Bjorn Helgaas <helgaas@kernel.org> - 2016-07-28 18:50 +0200
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