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Re: [PATCH v4 2/2] irqchip: add J-Core AIC driver

From Mark Rutland <mark.rutland@arm.com>
Newsgroups linux.kernel
Subject Re: [PATCH v4 2/2] irqchip: add J-Core AIC driver
Date 2016-07-28 16:10 +0200
Message-ID <rZUaB-7jd-3@gated-at.bofh.it> (permalink)
References (3 earlier) <rZwKZ-8gP-15@gated-at.bofh.it> <rZx4m-8nH-11@gated-at.bofh.it> <rZAvf-2cU-1@gated-at.bofh.it> <rZAYi-2pt-27@gated-at.bofh.it> <rZG7D-62u-9@gated-at.bofh.it>
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On Wed, Jul 27, 2016 at 07:01:24PM -0400, Rich Felker wrote:
> On Wed, Jul 27, 2016 at 06:31:52PM +0100, Mark Rutland wrote:

> > IIUC, that means you *could* implement per-irq masking by having the
> > CPU's mask value set to 0, and flipping the priority of an IRQ between 0
> > and 1 to disable/enable.
> > 
> > Though from your prior comments it sounds like for AIC2 writes to the
> > MMIO priority registers are ignored, so that would not work for AIC2?
> 
> Right. The register with 8 4-bit fields only made sense for the setup
> with 8 irq lines with variable priority; the aic2 has 64 lines with
> static priorities.

Thinking about this a little further, this is a good argument for the
"jcore,aic1" *not* being a valid fallback entry in an AIC2 compatible
list. Anything wanting to rely on this behaviour of AIC1 would be broken
on AIC2.

That being the case, no DT should have "jcore,aic1" for an AIC2 node,
and we can explciitly check for the AIC1 string for AIC1-specific
initialisation code (though regardless, it's worht a comment).

A further curiosity: what static priority values for AIC2 apply to
interrupts? Does it apply 0xf (or some over value) uniformly, or can
AIC2 interrupts potentially have varied priorities?

Thanks,
Mark.

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Thread

[PATCH v4 0/2] J-Core interrupt controller support Rich Felker <dalias@libc.org> - 2016-07-27 07:40 +0200
  [PATCH v4 2/2] irqchip: add J-Core AIC driver Rich Felker <dalias@libc.org> - 2016-07-27 07:40 +0200
    Re: [PATCH v4 2/2] irqchip: add J-Core AIC driver Mark Rutland <mark.rutland@arm.com> - 2016-07-27 12:20 +0200
      Re: [PATCH v4 2/2] irqchip: add J-Core AIC driver Rich Felker <dalias@libc.org> - 2016-07-27 15:10 +0200
        Re: [PATCH v4 2/2] irqchip: add J-Core AIC driver Mark Rutland <mark.rutland@arm.com> - 2016-07-27 15:30 +0200
          Re: [PATCH v4 2/2] irqchip: add J-Core AIC driver Rich Felker <dalias@libc.org> - 2016-07-27 19:10 +0200
    Re: [PATCH v4 2/2] irqchip: add J-Core AIC driver Mark Rutland <mark.rutland@arm.com> - 2016-07-27 12:20 +0200
      Re: [PATCH v4 2/2] irqchip: add J-Core AIC driver Rich Felker <dalias@libc.org> - 2016-07-27 15:10 +0200
        Re: [PATCH v4 2/2] irqchip: add J-Core AIC driver Mark Rutland <mark.rutland@arm.com> - 2016-07-27 15:30 +0200
          Re: [PATCH v4 2/2] irqchip: add J-Core AIC driver Rich Felker <dalias@libc.org> - 2016-07-27 19:10 +0200
            Re: [PATCH v4 2/2] irqchip: add J-Core AIC driver Mark Rutland <mark.rutland@arm.com> - 2016-07-27 19:40 +0200
              Re: [PATCH v4 2/2] irqchip: add J-Core AIC driver Rich Felker <dalias@libc.org> - 2016-07-28 01:10 +0200
                Re: [PATCH v4 2/2] irqchip: add J-Core AIC driver Mark Rutland <mark.rutland@arm.com> - 2016-07-28 16:10 +0200

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