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Re: [PATCH v4] ipc/msg: Implement lockless pipelined wakeups

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* Davidlohr Bueso | 2016-07-20 17:16:12 [-0700]:

>Just as with expunge_all and the E2BIG case, could you remove that explicit
>barrier (B) and just rely on wake_q_add?

Just did. So we have just a smp_rmb() on the reader side and the
comment talks about smb_wmb() and at the spot where we should have the
smb_wmb we have a comment why we don't have one :)
For my understanding: we need that smp_rmb() to ensure that everything
past that cmpxchg() is visible on all other CPUs so we don't have the
wakeup before we r_msg reads != -EAGAIN, right?

>Thanks,
>Davidlohr

Sebastian

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[PATCH v4] ipc/msg: Implement lockless pipelined wakeups Sebastian Andrzej Siewior <bigeasy@linutronix.de> - 2016-07-20 17:50 +0200
  Re: [PATCH v4] ipc/msg: Implement lockless pipelined wakeups Davidlohr Bueso <dave@stgolabs.net> - 2016-07-21 02:20 +0200
    [PATCH v5] ipc/msg: Implement lockless pipelined wakeups Sebastian Andrzej Siewior <bigeasy@linutronix.de> - 2016-07-21 12:10 +0200
    Re: [PATCH v4] ipc/msg: Implement lockless pipelined wakeups Sebastian Andrzej Siewior <bigeasy@linutronix.de> - 2016-07-21 12:30 +0200
      Re: [PATCH v4] ipc/msg: Implement lockless pipelined wakeups Davidlohr Bueso <dave@stgolabs.net> - 2016-07-21 21:50 +0200

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