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[PATCH v11 11/27] powerpc/ptrace: Enable support for EBB registers

From wei.guo.simon@gmail.com
Newsgroups linux.kernel
Subject [PATCH v11 11/27] powerpc/ptrace: Enable support for EBB registers
Date 2016-07-17 04:10 +0200
Message-ID <rVJGO-3ct-39@gated-at.bofh.it> (permalink)
References <rVJGN-3ct-3@gated-at.bofh.it>
Organization linux.* mail to news gateway

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From: Anshuman Khandual <khandual@linux.vnet.ibm.com>

This patch enables support for EBB state registers related
ELF core note NT_PPC_EBB based ptrace requests through
PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved
through adding one new register sets REGSET_EBB in powerpc
corresponding to the ELF core note sections added in this
regard. It also implements the get, set and active functions
for this new register sets added.

Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Shuah Khan <shuahkh@osg.samsung.com>
Cc: Anton Blanchard <anton@samba.org>
Cc: Cyril Bur <cyrilbur@gmail.com>
Cc: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Cc: Simon Guo <wei.guo.simon@gmail.com>
Cc: Ulrich Weigand <ulrich.weigand@de.ibm.com>
Cc: Michael Neuling <mikey@neuling.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Kees Cook <keescook@chromium.org>
Cc: Rashmica Gupta <rashmicy@gmail.com>
Cc: Khem Raj <raj.khem@gmail.com>
Cc: Jessica Yu <jeyu@redhat.com>
Cc: Jiri Kosina <jkosina@suse.cz>
Cc: Miroslav Benes <mbenes@suse.cz>
Cc: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Cc: Chris Smart <chris@distroguy.com>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselftest@vger.kernel.org
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
---
 arch/powerpc/include/uapi/asm/elf.h |  1 +
 arch/powerpc/kernel/ptrace.c        | 75 +++++++++++++++++++++++++++++++++++++
 2 files changed, 76 insertions(+)

diff --git a/arch/powerpc/include/uapi/asm/elf.h b/arch/powerpc/include/uapi/asm/elf.h
index e703c64..8c4d71a 100644
--- a/arch/powerpc/include/uapi/asm/elf.h
+++ b/arch/powerpc/include/uapi/asm/elf.h
@@ -94,6 +94,7 @@
 #define ELF_NVMX	34	/* includes all vector registers */
 #define ELF_NVSX	32	/* includes all VSX registers */
 #define ELF_NTMSPRREG	3	/* include tfhar, tfiar, texasr */
+#define ELF_NEBB       3       /* includes ebbrr, ebbhr, bescr */
 
 typedef unsigned long elf_greg_t64;
 typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 1a091db..52c69ed 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -1527,6 +1527,70 @@ static int tar_set(struct task_struct *target,
 				&target->thread.tar, 0, sizeof(u64));
 	return ret;
 }
+
+static int ebb_active(struct task_struct *target,
+			 const struct user_regset *regset)
+{
+	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
+		return -ENODEV;
+
+	if (target->thread.used_ebb)
+		return regset->n;
+
+	return 0;
+}
+
+static int ebb_get(struct task_struct *target,
+		      const struct user_regset *regset,
+		      unsigned int pos, unsigned int count,
+		      void *kbuf, void __user *ubuf)
+{
+	/* Build tests */
+	BUILD_BUG_ON(TSO(ebbrr) + sizeof(unsigned long) != TSO(ebbhr));
+	BUILD_BUG_ON(TSO(ebbhr) + sizeof(unsigned long) != TSO(bescr));
+
+	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
+		return -ENODEV;
+
+	if (!target->thread.used_ebb)
+		return -ENODATA;
+
+	return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+			&target->thread.ebbrr, 0, 3 * sizeof(unsigned long));
+}
+
+static int ebb_set(struct task_struct *target,
+		      const struct user_regset *regset,
+		      unsigned int pos, unsigned int count,
+		      const void *kbuf, const void __user *ubuf)
+{
+	int ret = 0;
+
+	/* Build tests */
+	BUILD_BUG_ON(TSO(ebbrr) + sizeof(unsigned long) != TSO(ebbhr));
+	BUILD_BUG_ON(TSO(ebbhr) + sizeof(unsigned long) != TSO(bescr));
+
+	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
+		return -ENODEV;
+
+	if (target->thread.used_ebb)
+		return -ENODATA;
+
+	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+			&target->thread.ebbrr, 0, sizeof(unsigned long));
+
+	if (!ret)
+		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+			&target->thread.ebbhr, sizeof(unsigned long),
+			2 * sizeof(unsigned long));
+
+	if (!ret)
+		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+			&target->thread.bescr,
+			2 * sizeof(unsigned long), 3 * sizeof(unsigned long));
+
+	return ret;
+}
 #endif
 /*
  * These are our native regset flavors.
@@ -1559,6 +1623,7 @@ enum powerpc_regset {
 #endif
 #ifdef CONFIG_PPC_BOOK3S_64
 	REGSET_TAR,		/* TAR register */
+	REGSET_EBB,		/* EBB registers */
 #endif
 };
 
@@ -1654,6 +1719,11 @@ static const struct user_regset native_regsets[] = {
 		.size = sizeof(u64), .align = sizeof(u64),
 		.get = tar_get, .set = tar_set
 	},
+	[REGSET_EBB] = {
+		.core_note_type = NT_PPC_EBB, .n = ELF_NEBB,
+		.size = sizeof(u64), .align = sizeof(u64),
+		.active = ebb_active, .get = ebb_get, .set = ebb_set
+	},
 #endif
 };
 
@@ -1940,6 +2010,11 @@ static const struct user_regset compat_regsets[] = {
 		.size = sizeof(u64), .align = sizeof(u64),
 		.get = tar_get, .set = tar_set
 	},
+	[REGSET_EBB] = {
+		.core_note_type = NT_PPC_EBB, .n = ELF_NEBB,
+		.size = sizeof(u64), .align = sizeof(u64),
+		.active = ebb_active, .get = ebb_get, .set = ebb_set
+	},
 #endif
 };
 
-- 
1.8.3.1

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Thread

[PATCH v11 00/27] Add new powerpc specific ELF core notes wei.guo.simon@gmail.com - 2016-07-17 04:10 +0200
  [PATCH v11 05/27] powerpc/ptrace: Enable support for NT_PPC_CFPR wei.guo.simon@gmail.com - 2016-07-17 04:10 +0200
  [PATCH v11 25/27] selftests/powerpc: Add ptrace tests for TM SPR registers wei.guo.simon@gmail.com - 2016-07-17 04:10 +0200
  [PATCH v11 11/27] powerpc/ptrace: Enable support for EBB registers wei.guo.simon@gmail.com - 2016-07-17 04:10 +0200
  [PATCH v11 18/27] selftests/powerpc: Add ptrace tests for GPR/FPR registers in suspended TM wei.guo.simon@gmail.com - 2016-07-17 04:10 +0200
  [PATCH v11 27/27] selftests/powerpc: Fix a build issue wei.guo.simon@gmail.com - 2016-07-17 04:10 +0200
  [PATCH v11 26/27] selftests/powerpc: Add .gitignore file for ptrace executables wei.guo.simon@gmail.com - 2016-07-17 04:10 +0200
  [PATCH v11 02/27] powerpc/process: Add the function flush_tmregs_to_thread wei.guo.simon@gmail.com - 2016-07-17 04:10 +0200
  [PATCH v11 03/27] powerpc/ptrace: Adapt gpr32_get, gpr32_set functions for transaction wei.guo.simon@gmail.com - 2016-07-17 04:10 +0200
  [PATCH v11 07/27] powerpc/ptrace: Enable support for NT_PPC_CVSX wei.guo.simon@gmail.com - 2016-07-17 04:10 +0200
  [PATCH v11 19/27] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR registers wei.guo.simon@gmail.com - 2016-07-17 04:10 +0200
  [PATCH v11 10/27] powerpc/ptrace: Enable support for NT_PPPC_TAR, NT_PPC_PPR, NT_PPC_DSCR wei.guo.simon@gmail.com - 2016-07-17 04:10 +0200
  [PATCH v11 21/27] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM wei.guo.simon@gmail.com - 2016-07-17 04:10 +0200
  [PATCH v11 16/27] selftests/powerpc: Add ptrace tests for GPR/FPR registers wei.guo.simon@gmail.com - 2016-07-17 04:10 +0200
  [PATCH v11 14/27] selftests/powerpc: Use the new SPRN_DSCR_PRIV definiton wei.guo.simon@gmail.com - 2016-07-17 04:10 +0200

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