Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]


Groups > linux.kernel > #1439117

Re: [PATCH v12 2/2] dmaengine: Add Xilinx zynqmp dma engine driver support

Path csiph.com!news.mixmin.net!news.albasani.net!fu-berlin.de!bofh.it!news.nic.it!robomod
From Vinod Koul <vinod.koul@intel.com>
Newsgroups linux.kernel
Subject Re: [PATCH v12 2/2] dmaengine: Add Xilinx zynqmp dma engine driver support
Date Fri, 08 Jul 2016 07:50:01 +0200
Message-ID <rSwPL-B6-5@gated-at.bofh.it> (permalink)
References <rQ4XD-64a-3@gated-at.bofh.it> <rQ4XE-64a-19@gated-at.bofh.it>
X-Original-To Kedareswara rao Appana <appana.durga.rao@xilinx.com>
X-Extloop1 1
X-Ironport-Av E=Sophos;i="5.28,328,1464678000"; d="scan'208";a="731268491"
MIME-Version 1.0
Content-Type text/plain; charset=us-ascii
Content-Disposition inline
User-Agent Mutt/1.5.21 (2010-09-15)
Sender robomod@news.nic.it
List-ID <linux-kernel.vger.kernel.org>
X-Mailing-List linux-kernel@vger.kernel.org
Approved robomod@news.nic.it
Lines 57
Organization linux.* mail to news gateway
X-Original-Cc robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, michal.simek@xilinx.com, soren.brinkmann@xilinx.com, dan.j.williams@intel.com, appanad@xilinx.com, moritz.fischer@ettus.com, laurent.pinchart@ideasonboard.com, luis@debethencourt.com, punnaia@xilinx.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org
X-Original-Date Fri, 8 Jul 2016 11:23:29 +0530
X-Original-Message-ID <20160708055328.GP12591@localhost>
X-Original-References <1467373026-27768-1-git-send-email-appanad@xilinx.com> <1467373026-27768-2-git-send-email-appanad@xilinx.com>
X-Original-Sender linux-kernel-owner@vger.kernel.org
Xref csiph.com linux.kernel:1439117

Show key headers only | View raw


On Fri, Jul 01, 2016 at 05:07:06PM +0530, Kedareswara rao Appana wrote:
> +static int zynqmp_dma_chan_probe(struct zynqmp_dma_device *zdev,
> +			   struct platform_device *pdev)
> +{
> +	struct zynqmp_dma_chan *chan;
> +	struct resource *res;
> +	struct device_node *node = pdev->dev.of_node;
> +	int err;
> +
> +	chan = devm_kzalloc(zdev->dev, sizeof(*chan), GFP_KERNEL);
> +	if (!chan)
> +		return -ENOMEM;
> +	chan->dev = zdev->dev;
> +	chan->zdev = zdev;
> +
> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +	chan->regs = devm_ioremap_resource(&pdev->dev, res);
> +	if (IS_ERR(chan->regs))
> +		return PTR_ERR(chan->regs);
> +
> +	chan->bus_width = ZYNQMP_DMA_BUS_WIDTH_64;
> +	chan->dst_burst_len = ZYNQMP_DMA_AWLEN_RST_VAL;
> +	chan->src_burst_len = ZYNQMP_DMA_ARLEN_RST_VAL;
> +	err = of_property_read_u32(node, "xlnx,bus-width", &chan->bus_width);
> +	if ((err < 0) && ((chan->bus_width != ZYNQMP_DMA_BUS_WIDTH_64) ||
> +			  (chan->bus_width != ZYNQMP_DMA_BUS_WIDTH_128))) {
> +		dev_err(zdev->dev, "invalid bus-width value");
> +		return err;
> +	}
> +
> +	chan->is_dmacoherent =  of_property_read_bool(node, "dma-coherent");
> +	zdev->chan = chan;
> +	tasklet_init(&chan->tasklet, zynqmp_dma_do_tasklet, (ulong)chan);

where is this killed?

> +	spin_lock_init(&chan->lock);
> +	INIT_LIST_HEAD(&chan->active_list);
> +	INIT_LIST_HEAD(&chan->pending_list);
> +	INIT_LIST_HEAD(&chan->done_list);
> +	INIT_LIST_HEAD(&chan->free_list);
> +
> +	dma_cookie_init(&chan->common);
> +	chan->common.device = &zdev->common;
> +	list_add_tail(&chan->common.device_node, &zdev->common.channels);
> +
> +	zynqmp_dma_init(chan);
> +	chan->irq = platform_get_irq(pdev, 0);
> +	if (chan->irq < 0)
> +		return -ENXIO;
> +	err = devm_request_irq(&pdev->dev, chan->irq, zynqmp_dma_irq_handler, 0,
> +			       "zynqmp-dma", chan);

this needs to be freed/diabled in remove, dont see that

-- 
~Vinod

Back to linux.kernel | Previous | NextPrevious in thread | Next in thread | Find similar | Unroll thread


Thread

[PATCH v12 1/2] Documentation: DT: dma: Add Xilinx zynqmp dma device tree binding documentation Kedareswara rao Appana <appana.durga.rao@xilinx.com> - 2016-07-01 13:40 +0200
  [PATCH v12 2/2] dmaengine: Add Xilinx zynqmp dma engine driver support Kedareswara rao Appana <appana.durga.rao@xilinx.com> - 2016-07-01 13:40 +0200
    Re: [PATCH v12 2/2] dmaengine: Add Xilinx zynqmp dma engine driver  support Vinod Koul <vinod.koul@intel.com> - 2016-07-08 07:50 +0200
      RE: [PATCH v12 2/2] dmaengine: Add Xilinx zynqmp dma engine driver  support Appana Durga Kedareswara Rao <appana.durga.rao@xilinx.com> - 2016-07-09 10:40 +0200
  Re: [PATCH v12 1/2] Documentation: DT: dma: Add Xilinx zynqmp dma  device tree binding documentation Vinod Koul <vinod.koul@intel.com> - 2016-07-08 08:00 +0200
    RE: [PATCH v12 1/2] Documentation: DT: dma: Add Xilinx zynqmp dma  device tree binding documentation Appana Durga Kedareswara Rao <appana.durga.rao@xilinx.com> - 2016-07-09 10:10 +0200

csiph-web