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Groups > linux.kernel > #1439197
| From | Borislav Petkov <bp@alien8.de> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 2/6] x86/RAS/AMD: Reduce number of IPIs when prepping error injection |
| Date | 2016-07-08 11:20 +0200 |
| Message-ID | <rSA70-2JT-13@gated-at.bofh.it> (permalink) |
| References | <rSzXk-2G5-25@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
From: Yazen Ghannam <Yazen.Ghannam@amd.com>
We currently use wrmsr_on_cpu() 4 times when prepping for an error
injection. This will generate 4 IPIs for each MSR write. We can reduce
the number of IPIs to 1 by grouping the MSR writes and executing them
serially on the appropriate CPU.
Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com>
Suggested-by: Borislav Petkov <bp@suse.de>
Cc: Aravind Gopalakrishnan <aravindksg.lkml@gmail.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: Tony Luck <tony.luck@intel.com>
Link: http://lkml.kernel.org/r/1466462347-31657-1-git-send-email-Yazen.Ghannam@amd.com
Signed-off-by: Borislav Petkov <bp@suse.de>
---
arch/x86/ras/mce_amd_inj.c | 58 ++++++++++++++++++++++------------------------
1 file changed, 28 insertions(+), 30 deletions(-)
diff --git a/arch/x86/ras/mce_amd_inj.c b/arch/x86/ras/mce_amd_inj.c
index e69f4701a076..1104515d5ad2 100644
--- a/arch/x86/ras/mce_amd_inj.c
+++ b/arch/x86/ras/mce_amd_inj.c
@@ -241,6 +241,31 @@ static void toggle_nb_mca_mst_cpu(u16 nid)
__func__, PCI_FUNC(F3->devfn), NBCFG);
}
+static void prepare_msrs(void *info)
+{
+ struct mce i_mce = *(struct mce *)info;
+ u8 b = i_mce.bank;
+
+ wrmsrl(MSR_IA32_MCG_STATUS, i_mce.mcgstatus);
+
+ if (boot_cpu_has(X86_FEATURE_SMCA)) {
+ if (i_mce.inject_flags == DFR_INT_INJ) {
+ wrmsrl(MSR_AMD64_SMCA_MCx_DESTAT(b), i_mce.status);
+ wrmsrl(MSR_AMD64_SMCA_MCx_DEADDR(b), i_mce.addr);
+ } else {
+ wrmsrl(MSR_AMD64_SMCA_MCx_STATUS(b), i_mce.status);
+ wrmsrl(MSR_AMD64_SMCA_MCx_ADDR(b), i_mce.addr);
+ }
+
+ wrmsrl(MSR_AMD64_SMCA_MCx_MISC(b), i_mce.misc);
+ } else {
+ wrmsrl(MSR_IA32_MCx_STATUS(b), i_mce.status);
+ wrmsrl(MSR_IA32_MCx_ADDR(b), i_mce.addr);
+ wrmsrl(MSR_IA32_MCx_MISC(b), i_mce.misc);
+ }
+
+}
+
static void do_inject(void)
{
u64 mcg_status = 0;
@@ -287,36 +312,9 @@ static void do_inject(void)
toggle_hw_mce_inject(cpu, true);
- wrmsr_on_cpu(cpu, MSR_IA32_MCG_STATUS,
- (u32)mcg_status, (u32)(mcg_status >> 32));
-
- if (boot_cpu_has(X86_FEATURE_SMCA)) {
- if (inj_type == DFR_INT_INJ) {
- wrmsr_on_cpu(cpu, MSR_AMD64_SMCA_MCx_DESTAT(b),
- (u32)i_mce.status, (u32)(i_mce.status >> 32));
-
- wrmsr_on_cpu(cpu, MSR_AMD64_SMCA_MCx_DEADDR(b),
- (u32)i_mce.addr, (u32)(i_mce.addr >> 32));
- } else {
- wrmsr_on_cpu(cpu, MSR_AMD64_SMCA_MCx_STATUS(b),
- (u32)i_mce.status, (u32)(i_mce.status >> 32));
-
- wrmsr_on_cpu(cpu, MSR_AMD64_SMCA_MCx_ADDR(b),
- (u32)i_mce.addr, (u32)(i_mce.addr >> 32));
- }
-
- wrmsr_on_cpu(cpu, MSR_AMD64_SMCA_MCx_MISC(b),
- (u32)i_mce.misc, (u32)(i_mce.misc >> 32));
- } else {
- wrmsr_on_cpu(cpu, MSR_IA32_MCx_STATUS(b),
- (u32)i_mce.status, (u32)(i_mce.status >> 32));
-
- wrmsr_on_cpu(cpu, MSR_IA32_MCx_ADDR(b),
- (u32)i_mce.addr, (u32)(i_mce.addr >> 32));
-
- wrmsr_on_cpu(cpu, MSR_IA32_MCx_MISC(b),
- (u32)i_mce.misc, (u32)(i_mce.misc >> 32));
- }
+ i_mce.mcgstatus = mcg_status;
+ i_mce.inject_flags = inj_type;
+ smp_call_function_single(cpu, prepare_msrs, &i_mce, 0);
toggle_hw_mce_inject(cpu, false);
--
2.7.3
Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread
[PATCH 0/6] x86/RAS queue Borislav Petkov <bp@alien8.de> - 2016-07-08 11:10 +0200
[PATCH 2/6] x86/RAS/AMD: Reduce number of IPIs when prepping error injection Borislav Petkov <bp@alien8.de> - 2016-07-08 11:20 +0200
[tip:ras/core] x86/RAS/AMD: Reduce the number of IPIs when prepping error injection tip-bot for Yazen Ghannam <tipbot@zytor.com> - 2016-07-08 14:10 +0200
[PATCH 6/6] x86/RAS: Add syndrome support to mce_amd_inj Borislav Petkov <bp@alien8.de> - 2016-07-08 11:20 +0200
[PATCH 5/6] EDAC, mce_amd: Print syndrome register value on SMCA systems Borislav Petkov <bp@alien8.de> - 2016-07-08 11:20 +0200
[PATCH 3/6] x86/mce: Add support for new MCA_SYND register Borislav Petkov <bp@alien8.de> - 2016-07-08 11:20 +0200
Re: [PATCH 3/6] x86/mce: Add support for new MCA_SYND register Ingo Molnar <mingo@kernel.org> - 2016-07-08 11:30 +0200
Re: [PATCH 3/6] x86/mce: Add support for new MCA_SYND register Borislav Petkov <bp@alien8.de> - 2016-07-08 11:40 +0200
Re: [PATCH 3/6] x86/mce: Add support for new MCA_SYND register Ingo Molnar <mingo@kernel.org> - 2016-07-08 11:50 +0200
Re: [PATCH 3/6] x86/mce: Add support for new MCA_SYND register Borislav Petkov <bp@alien8.de> - 2016-07-08 12:20 +0200
Re: [PATCH 3/6] x86/mce: Add support for new MCA_SYND register Ingo Molnar <mingo@kernel.org> - 2016-07-08 12:30 +0200
Re: [PATCH 3/6] x86/mce: Add support for new MCA_SYND register Borislav Petkov <bp@alien8.de> - 2016-07-08 12:50 +0200
[PATCH 1/6] x86/mce/AMD: Increase size of bank_map type Borislav Petkov <bp@alien8.de> - 2016-07-08 11:20 +0200
Re: [PATCH 1/6] x86/mce/AMD: Increase size of bank_map type Ingo Molnar <mingo@kernel.org> - 2016-07-08 11:30 +0200
Re: [PATCH 1/6] x86/mce/AMD: Increase size of bank_map type Borislav Petkov <bp@alien8.de> - 2016-07-08 11:40 +0200
[tip:ras/core] x86/mce/AMD: Increase size of the bank_map type tip-bot for Aravind Gopalakrishnan <tipbot@zytor.com> - 2016-07-08 14:10 +0200
[PATCH 4/6] x86/mce: Fix mce_rdmsrl() warning message Borislav Petkov <bp@alien8.de> - 2016-07-08 11:20 +0200
[tip:ras/core] x86/mce: Fix mce_rdmsrl() warning message tip-bot for Borislav Petkov <tipbot@zytor.com> - 2016-07-08 14:10 +0200
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