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Re: [PATCH v6 2/2] PCI: Rockchip: Add Rockchip PCIe controller support

From Brian Norris <briannorris@chromium.org>
Newsgroups linux.kernel
Subject Re: [PATCH v6 2/2] PCI: Rockchip: Add Rockchip PCIe controller support
Date 2016-07-07 02:50 +0200
Message-ID <rS5FT-80z-11@gated-at.bofh.it> (permalink)
References <rRPhL-67W-3@gated-at.bofh.it> <rRPhL-67W-7@gated-at.bofh.it> <rS5cR-7Pk-15@gated-at.bofh.it>
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Hi again,

On Wed, Jul 06, 2016 at 05:12:55PM -0700, Brian Norris wrote:
> On Wed, Jul 06, 2016 at 03:16:38PM +0800, Shawn Lin wrote:
> > +static void rockchip_pcie_legacy_int_handler(struct irq_desc *desc)
> > +{
> > +	struct irq_chip *chip = irq_desc_get_chip(desc);
> > +	struct rockchip_pcie_port *port;
> > +	u32 reg;
> > +	u32 hwirq;
> > +	u32 virq;
> > +
> > +	chained_irq_enter(chip, desc);
> > +	port = irq_desc_get_handler_data(desc);
> > +
> > +	reg = pcie_read(port, PCIE_CLIENT_INT_STATUS);
> > +	reg = (reg & ROCKCHIP_PCIE_RPIFR1_INTR_MASK) >>
> > +	       ROCKCHIP_PCIE_RPIFR1_INTR_SHIFT;
> > +
> > +	while (reg) {
> > +		hwirq = ffs(reg);

As I noted on the DT binding patch, the use of 'ffs' here is causing you
to make the interrupt controller binding implicitly 1-based, where it
would seemingly make more sense to be 0-based I think.

> > +		reg &= ~BIT(hwirq);
> 
> Per Marc's suggestion, you have created an infinite loop :)
> 
> This should be:
> 
> 	hwirq = ffs(reg);
> 	reg &= ~BIT(hwirq - 1);

So, this should actually be:

		hwirq = ffs(reg) - 1;
		reg &= ~BIT(hwirq);

> ...which brings me to this question: are you ever testing non-MSI (i.e.,
> "legacy") interrupts on this driver? There seems to be quite a bit of
> discussion about the structuring of the interrupt-map and
> interrupt-controller handling, but it appears this mostly/only gets
> actually *used* for the legacy interrupt case, and on my tests, legacy
> interrupts aren't really working, at least not with the new binding
> examples that you proposed. But then, you didn't send a rk3399.dtsi
> update, so perhaps I constructed my DTS wrong...
> 
> If you haven't been testing legacy interrupts, I'd recommend booting
> with "pci=nomsi" and see what happens.
> 
> > +
> > +		virq = irq_find_mapping(port->irq_domain, hwirq);
> > +		if (virq)
> > +			generic_handle_irq(virq);
> > +		else
> > +			dev_err(port->dev, "unexpected IRQ, INT%d\n", hwirq);
> > +	}
> > +
> > +	chained_irq_exit(chip, desc);
> > +}
> > +

Brian

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Thread

[PATCH v6 1/2] Documentation: bindings: add dt doc for Rockchip PCIe controller Shawn Lin <shawn.lin@rock-chips.com> - 2016-07-06 09:20 +0200
  [PATCH v6 2/2] PCI: Rockchip: Add Rockchip PCIe controller support Shawn Lin <shawn.lin@rock-chips.com> - 2016-07-06 09:20 +0200
    Re: [PATCH v6 2/2] PCI: Rockchip: Add Rockchip PCIe controller  support Brian Norris <briannorris@chromium.org> - 2016-07-07 02:20 +0200
      Re: [PATCH v6 2/2] PCI: Rockchip: Add Rockchip PCIe controller  support Brian Norris <briannorris@chromium.org> - 2016-07-07 02:50 +0200
    Re: [v6,2/2] PCI: Rockchip: Add Rockchip PCIe controller support Guenter Roeck <linux@roeck-us.net> - 2016-07-08 18:40 +0200
      Re: [v6,2/2] PCI: Rockchip: Add Rockchip PCIe controller support Arnd Bergmann <arnd@arndb.de> - 2016-07-08 22:10 +0200
  Re: [PATCH v6 1/2] Documentation: bindings: add dt doc for Rockchip  PCIe controller Brian Norris <briannorris@chromium.org> - 2016-07-07 02:40 +0200

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