[PATCH 0/2] PCI: designware: let dw_pcie_link_up() beware of LTSSM training bit

From	Jisheng Zhang <jszhang@marvell.com>
Newsgroups	linux.kernel
Subject	[PATCH 0/2] PCI: designware: let dw_pcie_link_up() beware of LTSSM training bit
Date	2016-07-06 13:10 +0200
Message-ID	<rRSSm-8rf-17@gated-at.bofh.it> (permalink)
Organization	linux.* mail to news gateway

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patch1 is a trivial clean up: move the parameters for wait for link
into the core pcie-designware.c

Since link may be UP but still in link training, if so, we can't think
the link is up and operating correctly. So patch2 teaches
dw_pcie_link_up() beware of the PCIE_PHY_DEBUG_R1_LINK_IN_TRAINING bit.


Jisheng Zhang (2):
  PCI: designware: mv parameters for wait for link into
    pcie-designware.c
  PCI: designware: let dw_pcie_link_up() beware of LTSSM training bit

 drivers/pci/host/pcie-designware.c | 11 +++++++++--
 drivers/pci/host/pcie-designware.h |  5 -----
 2 files changed, 9 insertions(+), 7 deletions(-)

-- 
2.8.1

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[PATCH 0/2] PCI: designware: let dw_pcie_link_up() beware of LTSSM training bit Jisheng Zhang <jszhang@marvell.com> - 2016-07-06 13:10 +0200
  [PATCH 2/2] PCI: designware: let dw_pcie_link_up() beware of LTSSM training bit Jisheng Zhang <jszhang@marvell.com> - 2016-07-06 13:10 +0200
  [PATCH 1/2] PCI: designware: mv parameters for wait for link into pcie-designware.c Jisheng Zhang <jszhang@marvell.com> - 2016-07-06 13:10 +0200

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