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Groups > linux.kernel > #1433759
| From | Kishon Vijay Abraham I <kishon@ti.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 3/3] phy: rockchip-emmc: Wait even longer for the DLL to lock |
| Date | 2016-06-29 16:00 +0200 |
| Message-ID | <rPoc1-4RT-23@gated-at.bofh.it> (permalink) |
| References | <rOIPv-3og-5@gated-at.bofh.it> <rOIPv-3og-15@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Monday 27 June 2016 11:09 PM, Douglas Anderson wrote:
> Two times out of 2000 reboots I ran into the error message
> "rockchip_emmc_phy_power: dllrdy timeout". Presumably there is some
> corner case where the DLL just takes a little longer to timeout. Let's
> give it even more time to handle these corner cases.
>
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> drivers/phy/phy-rockchip-emmc.c | 12 +++++++++++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/phy/phy-rockchip-emmc.c b/drivers/phy/phy-rockchip-emmc.c
> index a2aa6aca7dec..fd57345ffed2 100644
> --- a/drivers/phy/phy-rockchip-emmc.c
> +++ b/drivers/phy/phy-rockchip-emmc.c
> @@ -206,8 +206,18 @@ static int rockchip_emmc_phy_power(struct phy *phy, bool on_off)
> * per the math: 10.2 us * (50000000 Hz / 100000 Hz) => 5.1 ms
> * Hopefully we won't be running at 100 kHz, but we should still make
> * sure we wait long enough.
> + *
> + * NOTE: There appear to be corner cases where the DLL seems to take
> + * extra long to lock for reasons that aren't understood. In some
> + * extreme cases we've seen it take up to over 10ms (!). We'll be
> + * generous and give it 50ms. We still busy wait here because:
> + * - In most cases it should be super fast.
> + * - This is not called lots during normal operation so it shouldn't
> + * be a power or performance problem to busy wait. We expect it
> + * only at boot / resume. In both cases, eMMC is probably on the
> + * critical path so busy waiting a little extra time should be OK.
> */
> - timeout = jiffies + msecs_to_jiffies(10);
> + timeout = jiffies + msecs_to_jiffies(50);
> do {
> udelay(1);
>
>
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[PATCH 0/3] mmc: Fixes for 150 MHz Rockchip eMMC series Douglas Anderson <dianders@chromium.org> - 2016-06-27 19:50 +0200
[PATCH 2/3] phy: rockchip-emmc: Be tolerant to card clock of 0 in power on Douglas Anderson <dianders@chromium.org> - 2016-06-27 19:50 +0200
Re: [PATCH 2/3] phy: rockchip-emmc: Be tolerant to card clock of 0 in power on Kishon Vijay Abraham I <kishon@ti.com> - 2016-06-29 16:00 +0200
Re: [PATCH 2/3] phy: rockchip-emmc: Be tolerant to card clock of 0 in power on Doug Anderson <dianders@chromium.org> - 2016-06-29 17:20 +0200
[PATCH 3/3] phy: rockchip-emmc: Wait even longer for the DLL to lock Douglas Anderson <dianders@chromium.org> - 2016-06-27 19:50 +0200
Re: [PATCH 3/3] phy: rockchip-emmc: Wait even longer for the DLL to lock Kishon Vijay Abraham I <kishon@ti.com> - 2016-06-29 16:00 +0200
[PATCH 1/3] mmc: sdhci-of-arasan: Revert: Always power the PHY off/on when clock changes Douglas Anderson <dianders@chromium.org> - 2016-06-27 19:50 +0200
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