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Groups > linux.kernel > #1431267
| From | Alexandre Belloni <alexandre.belloni@free-electrons.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v3 5/8] rtc: ac100: Add clk output support |
| Date | 2016-06-26 02:50 +0200 |
| Message-ID | <rO6qR-4cI-3@gated-at.bofh.it> (permalink) |
| References | <rLXBn-2rY-5@gated-at.bofh.it> <rLXBo-2rY-13@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On 20/06/2016 at 10:52:15 +0800, Chen-Yu Tsai wrote :
> +struct ac100_clk32k {
> + struct clk_hw hw;
> + struct regmap *regmap;
> + u8 offset;
> +};
> +
> +#define to_ac100_clk32k(_hw) container_of(_hw, struct ac100_clk32k, hw)
> +
> +#define AC100_RTC_32K_NAME "ac100-rtc-32k"
> +#define AC100_RTC_32K_RATE 32768
> +#define AC100_ADDA_4M_NAME "ac100-adda-4M"
> +#define AC100_ADDA_4M_RATE 4000000
> +#define AC100_CLK32K_NUM 3
> +
> +static const char * const ac100_clk32k_names[] = {
> + "ac100-clk32k-ap",
> + "ac100-clk32k-bb",
> + "ac100-clk32k-md",
> +};
> +
Well, naming things is hard but I don't feel ac100_clk32k and
ac100-clk32k are good prefixes for those clocks as they are actually
dividing a 32KHz or 4MHz clock (one configuration out of 128 is 32KHz).
Else, I don't have any objection.
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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Re: [PATCH v3 5/8] rtc: ac100: Add clk output support Alexandre Belloni <alexandre.belloni@free-electrons.com> - 2016-06-26 02:50 +0200 Re: [PATCH v3 5/8] rtc: ac100: Add clk output support Chen-Yu Tsai <wens@csie.org> - 2016-06-26 17:00 +0200
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