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Groups > linux.kernel > #1427590
| From | Peter Zijlstra <peterz@infradead.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 1/1] perf/x86/intel: Add extended event constraints for Knights Landing |
| Date | 2016-06-21 12:40 +0200 |
| Message-ID | <rMrg7-4Cx-67@gated-at.bofh.it> (permalink) |
| References | <rHCYx-3wB-1@gated-at.bofh.it> <rHFto-4Z9-45@gated-at.bofh.it> <rM4Mx-73V-1@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Mon, Jun 20, 2016 at 10:26:30AM +0000, Odzioba, Lukasz wrote: > On 08.06.2016 Peter Zijlstra wrote: > > How does this work in the light of intel_alt_er() ? > > Hi Peter, > > If the constrained bit is valid on only one of the OCR MSRs (like in case of KNL), > then OCR valid mask will forbid altering it by the other MSR in intel_alt_er. Yes, that is the intent, but how is this achieved? I'm not sure I see how the patch ensure this. Also, intel_get_event_constraints() has a path where it copies the constraint, should it not also copy the new field?
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RE: [PATCH 1/1] perf/x86/intel: Add extended event constraints for Knights Landing "Odzioba, Lukasz" <lukasz.odzioba@intel.com> - 2016-06-20 12:40 +0200 Re: [PATCH 1/1] perf/x86/intel: Add extended event constraints for Knights Landing Peter Zijlstra <peterz@infradead.org> - 2016-06-21 12:40 +0200
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