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Re: [PATCH v3 08/15] mmc: sdhci-of-arasan: Properly set corecfg_baseclkfreq on rk3399

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On 20/06/16 20:56, Douglas Anderson wrote:
> In the the earlier change in this series ("Documentation: mmc:
> sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs") we can see the
> mechansim for specifying a syscon to properly set corecfg registers in
> sdhci-of-arasan.  Now let's use this mechanism to properly set
> corecfg_baseclkfreq on rk3399.
> 
>>From [1] the corecfg_baseclkfreq is supposed to be set to:
>   Base Clock Frequency for SD Clock.
>   This is the frequency of the xin_clk.
> 
> This is a relatively easy thing to do.  Note that we assume that xin_clk
> is not dynamic and we can check the clock at probe time.  If any real
> devices have a dynamic xin_clk future patches could register for
> notifiers for the clock.
> 
> At the moment, setting corecfg_baseclkfreq is only supported for rk3399
> since we need a specific map for each implementation.  The code is
> written in a generic way that should make this easy to extend to other
> SoCs.  Note that a specific compatible string for rk3399 is already in
> use and so we add that to the table to match rk3399.
> 
> [1]: https://arasan.com/wp-content/media/eMMC-5-1-Total-Solution_Rev-1-3.pdf
> 
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
> Tested-by: Heiko Stuebner <heiko@sntech.de>

Acked-by: Adrian Hunter <adrian.hunter@intel.com>

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[PATCH v3 0/15] Changes to support 150 MHz eMMC on rk3399 Douglas Anderson <dianders@chromium.org> - 2016-06-20 20:10 +0200
  [PATCH v3 06/15] mmc: sdhci-of-arasan: Always power the PHY off/on when clock changes Douglas Anderson <dianders@chromium.org> - 2016-06-20 20:10 +0200
    Re: [PATCH v3 06/15] mmc: sdhci-of-arasan: Always power the PHY  off/on when clock changes Adrian Hunter <adrian.hunter@intel.com> - 2016-06-22 14:40 +0200
  [PATCH v3 08/15] mmc: sdhci-of-arasan: Properly set corecfg_baseclkfreq on rk3399 Douglas Anderson <dianders@chromium.org> - 2016-06-20 20:20 +0200
    Re: [PATCH v3 08/15] mmc: sdhci-of-arasan: Properly set  corecfg_baseclkfreq on rk3399 Adrian Hunter <adrian.hunter@intel.com> - 2016-06-22 14:40 +0200
  Re: [PATCH v3 0/15] Changes to support 150 MHz eMMC on rk3399 Heiko Stübner <heiko@sntech.de> - 2016-06-20 20:20 +0200
  [PATCH v3 14/15] phy: rockchip-emmc: Set phyctrl_frqsel based on card clock Douglas Anderson <dianders@chromium.org> - 2016-06-20 20:20 +0200
    Re: [PATCH v3 14/15] phy: rockchip-emmc: Set phyctrl_frqsel based on card clock Heiko Stübner <heiko@sntech.de> - 2016-06-20 20:20 +0200
  [PATCH v3 09/15] arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399 Douglas Anderson <dianders@chromium.org> - 2016-06-20 20:30 +0200
    Re: [PATCH v3 09/15] arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399 Heiko Stübner <heiko@sntech.de> - 2016-06-22 18:40 +0200
  [PATCH v3 13/15] phy: rockchip-emmc: Minor code cleanup in rockchip_emmc_phy_power_on/off() Douglas Anderson <dianders@chromium.org> - 2016-06-20 20:40 +0200
  [PATCH v3 10/15] Documentation: mmc: sdhci-of-arasan: Add ability to export card clock Douglas Anderson <dianders@chromium.org> - 2016-06-20 20:40 +0200
  [PATCH v3 02/15] phy: rockchip-emmc: configure frequency range and drive impedance Douglas Anderson <dianders@chromium.org> - 2016-06-20 20:40 +0200
  [PATCH v3 04/15] phy: rockchip-emmc: reindent the register definitions Douglas Anderson <dianders@chromium.org> - 2016-06-20 20:40 +0200
  [PATCH v3 01/15] phy: rockchip-emmc: give DLL some extra time to be ready Douglas Anderson <dianders@chromium.org> - 2016-06-20 20:40 +0200
    Re: [PATCH v3 01/15] phy: rockchip-emmc: give DLL some extra time to  be ready Guenter Roeck <groeck@google.com> - 2016-06-20 21:30 +0200
      Re: [PATCH v3 01/15] phy: rockchip-emmc: give DLL some extra time to  be ready Doug Anderson <dianders@chromium.org> - 2016-06-20 21:40 +0200
      Re: [PATCH v3 01/15] phy: rockchip-emmc: give DLL some extra time to  be ready Doug Anderson <dianders@chromium.org> - 2016-06-20 21:40 +0200
        Re: [PATCH v3 01/15] phy: rockchip-emmc: give DLL some extra time to  be ready Guenter Roeck <groeck@google.com> - 2016-06-20 21:50 +0200
  [PATCH v3 07/15] Documentation: mmc: sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs Douglas Anderson <dianders@chromium.org> - 2016-06-20 22:00 +0200
  Re: [PATCH v3 0/15] Changes to support 150 MHz eMMC on rk3399 Ulf Hansson <ulf.hansson@linaro.org> - 2016-06-22 17:30 +0200

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