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Re: DRM DMA Engine

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On Tue, Jun 14, 2016 at 1:19 PM, Jose Abreu <Jose.Abreu@synopsys.com> wrote:
>> I assume that xilinx VDMA is the only way to feed pixel data into your
>> display pipeline. Under that assumption:
>>
>> drm_plane should map to Xilinx VDMA, and the drm_plane->drm_crtc link
>> would represent the dma channel. With atomic you can subclass
>> drm_plane/crtc_state structures to store all the runtime configuration in
>> there.
>>
>> The actual buffer itsel would be represented by a drm_framebuffer, which
>> either wraps a shmem gem or a cma gem object.
>>
>> If you want to know about the callbacks used by the atomic helpers to push
>> out plane updates, look at the hooks drm_atomic_helper_commit_planes()
>> (and the related functions, see kerneldoc) calls.
>>
>> I hope this helps a bit more.
>> -Daniel
>
> Thanks a lot! With your help I was able to implement all the
> needed logic. Sorry to bother you but I have one more question.
> Right now I can initialize and configure the vdma correctly but I
> can only send one frame. I guess when the dma completes
> transmission I need to ask drm for a new frame, right? Because
> the commit function starts the vdma correctly but then the dma
> halts waiting for a new descriptor.

DRM has a continuous scanout model, i.e. when userspace doesn't give
you a new frame you're supposed to keep scanning out the current one.
So you need to rearm your upload code with the same drm_framebuffer if
userspace hasn't supplied a new one since the last time before the
vblank period starts.

This is different to v4l, where userspace has to supply each frame
(and the kernel gets angry when there's not enough frames and signals
an underrun of the queue). This is because drm is geared at desktops,
and there it's perfectly normal to show the exact same frame for a
long time.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

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Re: DRM DMA Engine Jose Abreu <Jose.Abreu@synopsys.com> - 2016-06-14 13:30 +0200
  Re: DRM DMA Engine Daniel Vetter <daniel@ffwll.ch> - 2016-06-15 11:00 +0200
    Re: DRM DMA Engine Jose Abreu <Jose.Abreu@synopsys.com> - 2016-06-15 11:50 +0200
      Re: DRM DMA Engine Daniel Vetter <daniel@ffwll.ch> - 2016-06-15 12:20 +0200
        Re: DRM DMA Engine Jose Abreu <Jose.Abreu@synopsys.com> - 2016-06-16 14:10 +0200
          Re: DRM DMA Engine Daniel Vetter <daniel@ffwll.ch> - 2016-06-16 14:40 +0200
          Re: DRM DMA Engine Ilia Mirkin <imirkin@alum.mit.edu> - 2016-06-16 14:40 +0200
            Re: DRM DMA Engine Jose Abreu <Jose.Abreu@synopsys.com> - 2016-06-20 17:40 +0200

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