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Groups > linux.kernel > #1421423
| From | Douglas Anderson <dianders@chromium.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v2 05/11] arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399 |
| Date | 2016-06-14 01:10 +0200 |
| Message-ID | <rJJ9v-4Iu-1@gated-at.bofh.it> (permalink) |
| References | <rJJ9v-4Iu-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On rk3399 we'd like to be able to properly set corecfg registers in the Arasan SDHCI component. Specify the syscon to enable that. Signed-off-by: Douglas Anderson <dianders@chromium.org> --- Changes in v2: None arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index a4383f359264..1b57e92e0093 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -220,6 +220,7 @@ compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1"; reg = <0x0 0xfe330000 0x0 0x10000>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; + arasan,soc-ctl-syscon = <&grf>; assigned-clocks = <&cru SCLK_EMMC>; assigned-clock-rates = <200000000>; clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>; -- 2.8.0.rc3.226.g39d4020
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[PATCH v2 05/11] arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399 Douglas Anderson <dianders@chromium.org> - 2016-06-14 01:10 +0200 Re: [PATCH v2 05/11] arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399 Heiko Stübner <heiko@sntech.de> - 2016-06-18 15:00 +0200
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