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| Path | csiph.com!aioe.org!bofh.it!news.nic.it!robomod |
|---|---|
| From | Mark Rutland <mark.rutland@arm.com> |
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v4] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs |
| Date | Mon, 13 Jun 2016 19:30:01 +0200 |
| Message-ID | <rJDQt-To-1@gated-at.bofh.it> (permalink) |
| References | <rJDx7-LB-15@gated-at.bofh.it> |
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| X-Original-Cc | catalin.marinas@arm.com, will.deacon@arm.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, steve.capper@arm.com, linux@arm.linux.org.uk, Steve Capper <steve.capper@linaro.org> |
| X-Original-Date | Mon, 13 Jun 2016 18:26:16 +0100 |
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| Xref | csiph.com linux.kernel:1421066 |
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On Mon, Jun 13, 2016 at 06:08:09PM +0100, Suzuki K Poulose wrote: > +/* > + * Both MIDR_EL1 and REVIDR_EL1 are 32bit registers. However, per C5.1.1, > + * "Principles of the System instruction class encoding" in ARM DDI 0487A.i, > + * when a system register is escribed as 32-bit, this only means that the > + * upper 32 bits are RES0, not that they will never be made use of. To avoid > + * changing the ABI for the future, the values are exported as 64bit values. > + */ I see this is a direct copy+paste of my earlier message, typo and all. I'd prefer something like the below: /* * The ARM ARM uses the phrase "32-bit register" to describe a register * whose upper 32 bits are RES0 (per C5.1.1, ARM DDI 0487A.i), however * no statement is made as to whether the upper 32 bits will or will not * be made use of in future, and between ARM DDI 0487A.c and ARM DDI * 0487A.d CLIDR_EL1 was expanded from 32-bit to 64-bit. * * Thus, while both MIDR_EL1 and REVIDR_EL1 are described as 32-bit * registers, we expose them both as 64 bit values to cater for possible * future expansion without an ABI break. */ Thanks, Mark.
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[PATCH v4] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs Suzuki K Poulose <suzuki.poulose@arm.com> - 2016-06-13 19:10 +0200
Re: [PATCH v4] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs Mark Rutland <mark.rutland@arm.com> - 2016-06-13 19:30 +0200
Re: [PATCH v4] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-06-13 19:50 +0200
Re: [PATCH v4] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs Russell King - ARM Linux <linux@armlinux.org.uk> - 2016-06-13 19:30 +0200
Re: [PATCH v4] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs Catalin Marinas <catalin.marinas@arm.com> - 2016-06-14 13:10 +0200
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