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Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

From Carlo Caione <carlo@caione.org>
Newsgroups linux.kernel
Subject Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger
Date 2016-06-09 17:30 +0200
Message-ID <rIa4a-8aG-31@gated-at.bofh.it> (permalink)
References <rH6YF-84b-7@gated-at.bofh.it> <rH6YG-84b-29@gated-at.bofh.it>
Organization linux.* mail to news gateway

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On 06/06/16 18:56, Marc Zyngier wrote:
> The ARM architected timer specification mandates that the interrupt
> associated with each timer is level triggered (which corresponds to
> the "counter >= comparator" condition).
> 
> A number of DTs are being remarkably creative, declaring the interrupt
> to be edge triggered. A quick look at the TRM for the corresponding ARM
> CPUs clearly shows that this is wrong, and I've corrected those.
> For non-ARM designs (and in the absence of a publicly available TRM),
> I've made them active low as well, which can't be completely wrong
> as the GIC cannot disinguish between level low and level high.
> 
> The respective maintainers are of course welcome to prove me wrong.
> 
> While I was at it, I took the liberty to fix a couple of related issue,
> such as some spurious affinity bits on ThunderX, and their complete
> absence on ls1043a (both of which seem to be related to copy-pasting
> from other DTs).
> 
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>

For meson-gxbb.dtsi:

Acked-by: Carlo Caione <carlo@endlessm.com>

-- 
Carlo Caione

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Thread

[PATCH v3 0/2] arm/arm64: Fix architected timer interrupt trigger Marc Zyngier <marc.zyngier@arm.com> - 2016-06-06 20:00 +0200
  [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger Marc Zyngier <marc.zyngier@arm.com> - 2016-06-06 20:00 +0200
    Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt  trigger Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2016-06-07 09:10 +0200
    Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt  trigger Michal Simek <michal.simek@xilinx.com> - 2016-06-07 09:40 +0200
    Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer  interrupt trigger Carlo Caione <carlo@caione.org> - 2016-06-09 17:30 +0200
    Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt  trigger David Daney <ddaney.cavm@gmail.com> - 2016-06-09 23:10 +0200
      Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer  interrupt trigger Marc Zyngier <marc.zyngier@arm.com> - 2016-06-10 09:30 +0200
        Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt  trigger David Daney <ddaney.cavm@gmail.com> - 2016-06-10 19:00 +0200
          Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt  trigger Marc Zyngier <marc.zyngier@arm.com> - 2016-06-10 19:00 +0200
            Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer  interrupt trigger Marc Zyngier <marc.zyngier@arm.com> - 2016-06-11 12:10 +0200
    Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger Duc Dang <dhdang@apm.com> - 2016-06-10 23:50 +0200

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