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Groups > linux.kernel > #1418398
| From | Damien Riegel <damien.riegel@savoirfairelinux.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v2 1/2] ARM: dts: TS-4800: add FPGA's IRQ controller support |
| Date | 2016-06-09 16:50 +0200 |
| Message-ID | <rI9rs-7FY-9@gated-at.bofh.it> (permalink) |
| Organization | linux.* mail to news gateway |
Enable FPGA's IRQ controller. It is in charge of dispatching interrupts
generated by IPs in the FPGA. The SoC is notified that an interrupt
occurred through a GPIO.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
---
Changes in v2:
- Remove new lines
- Use hyphen rather than underscore in node name
- Get rid of "0," in unit-address
- Move node to keep them sorted by unit-address
arch/arm/boot/dts/imx51-ts4800.dts | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/imx51-ts4800.dts b/arch/arm/boot/dts/imx51-ts4800.dts
index 0ff76a1..0e80fb7 100644
--- a/arch/arm/boot/dts/imx51-ts4800.dts
+++ b/arch/arm/boot/dts/imx51-ts4800.dts
@@ -165,6 +165,17 @@
reg = <0x12000 0x1000>;
syscon = <&syscon 0x10 6>;
};
+
+ fpga_irqc: fpga-irqc@15000 {
+ compatible = "technologic,ts4800-irqc";
+ reg = <0x15000 0x1000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_interrupt_fpga>;
+ interrupt-parent = <&gpio2>;
+ interrupts= <9 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
};
@@ -228,6 +239,12 @@
>;
};
+ pinctrl_interrupt_fpga: fpgaicgrp {
+ fsl,pins = <
+ MX51_PAD_EIM_D27__GPIO2_9 0xe5
+ >;
+ };
+
pinctrl_lcd: lcdgrp {
fsl,pins = <
MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
--
2.5.0
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[PATCH v2 1/2] ARM: dts: TS-4800: add FPGA's IRQ controller support Damien Riegel <damien.riegel@savoirfairelinux.com> - 2016-06-09 16:50 +0200 [PATCH v2 2/2] ARM: dts: TS-4800: add CAN support Damien Riegel <damien.riegel@savoirfairelinux.com> - 2016-06-09 16:50 +0200 Re: [PATCH v2 1/2] ARM: dts: TS-4800: add FPGA's IRQ controller support Shawn Guo <shawnguo@kernel.org> - 2016-06-09 17:20 +0200
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