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Re: [PATCH V5 4/9] genirq: Add runtime power management support for IRQ chips

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On 06/06/16 16:06, Jon Hunter wrote:
> 
> On 06/06/16 15:36, Grygorii Strashko wrote:
>> On 06/06/2016 05:30 PM, Jon Hunter wrote:
>>>
>>> On 06/06/16 15:13, Grygorii Strashko wrote:
>>>> On 06/06/2016 02:53 PM, Jon Hunter wrote:
>>>>> Some IRQ chips may be located in a power domain outside of the CPU
>>>>> subsystem and hence will require device specific runtime power
>>>>> management. In order to support such IRQ chips, add a pointer for a
>>>>> device structure to the irq_chip structure, and if this pointer is
>>>>> populated by the IRQ chip driver and CONFIG_PM is selected in the kernel
>>>>> configuration, then the pm_runtime_get/put APIs for this chip will be
>>>>> called when an IRQ is requested/freed, respectively.
>>>>>
>>>>> Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
>>>>> Reviewed-by: Kevin Hilman <khilman@baylibre.com>
>>>>> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
>>>>> ---
>>>>>    include/linux/irq.h    |  4 ++++
>>>>>    kernel/irq/chip.c      | 35 +++++++++++++++++++++++++++++++++++
>>>>>    kernel/irq/internals.h |  1 +
>>>>>    kernel/irq/manage.c    | 31 ++++++++++++++++++++++++++++++-
>>>>>    4 files changed, 70 insertions(+), 1 deletion(-)
>>>>>
>>>>> diff --git a/include/linux/irq.h b/include/linux/irq.h
>>>>> index 4d758a7c604a..6c92a847394d 100644
>>>>> --- a/include/linux/irq.h
>>>>> +++ b/include/linux/irq.h
>>>>> @@ -315,6 +315,7 @@ static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
>>>>>    /**
>>>>>     * struct irq_chip - hardware interrupt chip descriptor
>>>>>     *
>>>>> + * @parent_device:	pointer to parent device for irqchip
>>>>>     * @name:		name for /proc/interrupts
>>>>>     * @irq_startup:	start up the interrupt (defaults to ->enable if NULL)
>>>>>     * @irq_shutdown:	shut down the interrupt (defaults to ->disable if NULL)
>>>>> @@ -354,6 +355,7 @@ static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
>>>>>     * @flags:		chip specific flags
>>>>>     */
>>>>>    struct irq_chip {
>>>>> +	struct device	*parent_device;
>>>>>    	const char	*name;
>>>>>    	unsigned int	(*irq_startup)(struct irq_data *data);
>>>>>    	void		(*irq_shutdown)(struct irq_data *data);
>>>>> @@ -488,6 +490,8 @@ extern void handle_bad_irq(struct irq_desc *desc);
>>>>>    extern void handle_nested_irq(unsigned int irq);
>>>>>    
>>>>>    extern int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg);
>>>>> +extern int irq_chip_pm_get(struct irq_data *data);
>>>>> +extern int irq_chip_pm_put(struct irq_data *data);
>>>>>    #ifdef	CONFIG_IRQ_DOMAIN_HIERARCHY
>>>>>    extern void irq_chip_enable_parent(struct irq_data *data);
>>>>>    extern void irq_chip_disable_parent(struct irq_data *data);
>>>>> diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
>>>>> index 2f9f2b0e79f2..b09226e895c7 100644
>>>>> --- a/kernel/irq/chip.c
>>>>> +++ b/kernel/irq/chip.c
>>>>> @@ -1093,3 +1093,38 @@ int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
>>>>>    
>>>>>    	return 0;
>>>>>    }
>>>>> +
>>>>> +/**
>>>>> + * irq_chip_pm_get - Enable power for an IRQ chip
>>>>> + * @data:	Pointer to interrupt specific data
>>>>> + *
>>>>> + * Enable the power to the IRQ chip referenced by the interrupt data
>>>>> + * structure.
>>>>> + */
>>>>> +int irq_chip_pm_get(struct irq_data *data)
>>>>> +{
>>>>> +	int retval = 0;
>>>>> +
>>>>> +	if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device)
>>>>> +		retval = pm_runtime_get_sync(data->chip->parent_device);
>>>>
>>>> Sry, for the late comment - above require pm_runtime_put_noidle(data->chip->parent_device);
>>>> in case of failure.
>>>
>>> No problem. Sorry, can you elaborate? I am not familiar with the
>>> _put_noidle().
>>>
>>
>> Question here in use counter - pm_runtime_get_sync() will increment usage_count
>> always and it will not decrement it in case of failure.
>> pm_runtime_put_noidle() expected to restore usage_count state (-1).
> 
> Thanks was not aware of that. 
> 
> Kevin, Marc, given that you have reviewed this one, are you ok with the
> above change Grygorii is proposing? 
> 
> diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
> index b09226e895c7..63f1860acc4c 100644
> --- a/kernel/irq/chip.c
> +++ b/kernel/irq/chip.c
> @@ -1105,8 +1105,11 @@ int irq_chip_pm_get(struct irq_data *data)
>  {
>         int retval = 0;
>  
> -       if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device)
> +       if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device) {
>                 retval = pm_runtime_get_sync(data->chip->parent_device);
> +               if (retval < 0)
> +                       pm_runtime_put_noidle(data->chip->parent_device);
> +       }
>  
>         return (retval < 0) ? retval : 0;
>  }
>  

That looks correct to me (having had a look at
Documentation/power/runtime_pm.txt).

	M.
-- 
Jazz is not dead. It just smells funny...

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[PATCH V5 0/9] Add support for Tegra210 AGIC Jon Hunter <jonathanh@nvidia.com> - 2016-06-06 14:00 +0200
  [PATCH V5 9/9] irqchip/gic: Add platform driver for non-root GICs that require RPM Jon Hunter <jonathanh@nvidia.com> - 2016-06-06 14:00 +0200
  [PATCH V5 4/9] genirq: Add runtime power management support for IRQ chips Jon Hunter <jonathanh@nvidia.com> - 2016-06-06 14:00 +0200
    Re: [PATCH V5 4/9] genirq: Add runtime power management support for  IRQ chips Grygorii Strashko <grygorii.strashko@ti.com> - 2016-06-06 16:20 +0200
      Re: [PATCH V5 4/9] genirq: Add runtime power management support for  IRQ chips Grygorii Strashko <grygorii.strashko@ti.com> - 2016-06-06 16:40 +0200
        Re: [PATCH V5 4/9] genirq: Add runtime power management support for  IRQ chips Jon Hunter <jonathanh@nvidia.com> - 2016-06-06 17:10 +0200
          Re: [PATCH V5 4/9] genirq: Add runtime power management support for  IRQ chips Marc Zyngier <marc.zyngier@arm.com> - 2016-06-06 18:10 +0200
          Re: [PATCH V5 4/9] genirq: Add runtime power management support for IRQ chips Kevin Hilman <khilman@baylibre.com> - 2016-06-10 01:00 +0200
            Re: [PATCH V5 4/9] genirq: Add runtime power management support for  IRQ chips Jon Hunter <jonathanh@nvidia.com> - 2016-06-10 10:10 +0200
      Re: [PATCH V5 4/9] genirq: Add runtime power management support for  IRQ chips Jon Hunter <jonathanh@nvidia.com> - 2016-06-06 16:40 +0200
  [PATCH V5 1/9] irqdomain: Fix handling of type settings for existing mappings Jon Hunter <jonathanh@nvidia.com> - 2016-06-06 14:00 +0200
  [PATCH V5 3/9] irqdomain: Don't set type when mapping an IRQ Jon Hunter <jonathanh@nvidia.com> - 2016-06-06 14:00 +0200
  [PATCH V5 8/9] dt-bindings: arm-gic: Add documentation for Tegra210 AGIC Jon Hunter <jonathanh@nvidia.com> - 2016-06-06 14:00 +0200
  [PATCH V5 5/9] irqchip/gic: Isolate early GIC initialisation code Jon Hunter <jonathanh@nvidia.com> - 2016-06-06 14:00 +0200
  [PATCH V5 6/9] irqchip/gic: Add helper function for chip initialisation Jon Hunter <jonathanh@nvidia.com> - 2016-06-06 14:00 +0200
  [PATCH V5 2/9] genirq: Look-up trigger type if not specified by caller Jon Hunter <jonathanh@nvidia.com> - 2016-06-06 14:00 +0200

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