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Re: [PATCH v1] KVM: VMX: enable guest access to LMCE related MSRs

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2016-06-03 14:08+0800, Haozhong Zhang:
> On Intel platforms, this patch adds LMCE to KVM MCE supported
> capabilities and handles guest access to LMCE related MSRs.
> 
> Signed-off-by: Ashok Raj <ashok.raj@intel.com>
> Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>
> ---
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> @@ -2863,6 +2863,11 @@ static int vmx_get_vmx_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
>  	return 0;
>  }
>  
> +static inline bool vmx_feature_control_msr_required(struct kvm_vcpu *vcpu)

I'd call it "present", rather than "required".  SDM does so for other
MSRs and it is easier to understand in the condition that returns #GP if
this function is false.

> +{
> +	return nested_vmx_allowed(vcpu) || (vcpu->arch.mcg_cap & MCG_LMCE_P);
> +}
> @@ -2904,8 +2909,15 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>  	case MSR_IA32_FEATURE_CONTROL:
> -		if (!nested_vmx_allowed(vcpu))
> +		if (!vmx_feature_control_msr_required(vcpu))
>  			return 1;
>  		msr_info->data = to_vmx(vcpu)->nested.msr_ia32_feature_control;

(MSR_IA32_FEATURE_CONTROL does not depend only on nested anymore, so
 moving msr_ia32_feature_control from struct nested_vmx to struct
 vcpu_vmx would make sense.)

>  		break;
> @@ -2997,8 +3009,17 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> +	case MSR_IA32_MCG_EXT_CTL:
> +		if (!(vcpu->arch.mcg_cap & MCG_LMCE_P) ||
> +		    !(to_vmx(vcpu)->nested.msr_ia32_feature_control &
> +		      FEATURE_CONTROL_LMCE))

(This check is used twice and could be given a name too,
 "vmx_mcg_ext_ctl_msr_present()"?)

> +			return 1;
> +		if (data && data != 0x1)

  (data & ~MCG_EXT_CTL_LMCE_EN)

is a clearer check for reserved bits.

> +			return -1;
> +		vcpu->arch.mcg_ext_ctl = data;
> +		break;
>  	case MSR_IA32_FEATURE_CONTROL:
> -		if (!nested_vmx_allowed(vcpu) ||
> +		if (!vmx_feature_control_msr_required(vcpu) ||
>  		    (to_vmx(vcpu)->nested.msr_ia32_feature_control &
>  		     FEATURE_CONTROL_LOCKED && !msr_info->host_initiated))
>  			return 1;

Does hardware throw #GP when FEATURE_CONTROL_LMCE is set without
MCG_LMCE_P?

(We could emulate that by having a mask of valid bits and also use that
 mask in place of vmx_feature_control_msr_required().  I don't think
 there is a reason to have only vmx_feature_control_msr_required() if
 the hardware can #GP on individual bits too.)

Thanks.

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[PATCH v1] Add KVM support for Intel local MCE Haozhong Zhang <haozhong.zhang@intel.com> - 2016-06-03 08:10 +0200
  [PATCH v1] KVM: VMX: enable guest access to LMCE related MSRs Haozhong Zhang <haozhong.zhang@intel.com> - 2016-06-03 08:20 +0200
    Re: [PATCH v1] KVM: VMX: enable guest access to LMCE related MSRs Radim Krčmář <rkrcmar@redhat.com> - 2016-06-03 17:40 +0200
      Re: [PATCH v1] KVM: VMX: enable guest access to LMCE related MSRs Haozhong Zhang <haozhong.zhang@intel.com> - 2016-06-05 17:20 +0200
    Re: [PATCH v1] KVM: VMX: enable guest access to LMCE related MSRs Boris Petkov <bp@suse.de> - 2016-06-04 13:10 +0200
      Re: [PATCH v1] KVM: VMX: enable guest access to LMCE related MSRs Haozhong Zhang <haozhong.zhang@intel.com> - 2016-06-05 17:20 +0200
        Re: [PATCH v1] KVM: VMX: enable guest access to LMCE related MSRs Borislav Petkov <bp@suse.de> - 2016-06-05 21:50 +0200
          Re: [PATCH v1] KVM: VMX: enable guest access to LMCE related MSRs Haozhong Zhang <haozhong.zhang@intel.com> - 2016-06-06 02:20 +0200

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